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Age	Commit message (Expand)	Author
2019-07-01	riscv: defconfig: enable SOC_SIFIVE	Loys Ollivier
2019-07-01	RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS	Anup Patel
2019-06-26	RISC-V: defconfig: enable MMC & SPI for RISC-V	Atish Patra
2019-06-11	RISC-V: defconfig: enable clocks, serial console	Kevin Hilman
2019-04-09	RISC-V: Add separate defconfig for 32bit systems	Anup Patel
2019-01-23	RISC-V: defconfig: Add CRYPTO_DEV_VIRTIO=y	Palmer Dabbelt
2019-01-23	RISC-V: defconfig: Enable Generic PCIE by default	Alistair Francis
2019-01-23	RISC-V: defconfig: Move CONFIG_PCI{,E_XILINX}	Palmer Dabbelt
2018-12-17	RISC-V: defconfig: Enable RISC-V SBI earlycon support	Anup Patel
2018-11-12	RISC-V: defconfig: Enable printk timestamps	Anup Patel
2018-11-01	RISC-V: refresh defconfig	Anup Patel
2018-08-13	irqchip: add a SiFive PLIC driver	Christoph Hellwig
2018-06-11	RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig	Palmer Dabbelt
2018-04-02	RISC-V: Enable module support in defconfig	Zong Li
2018-01-07	RISC-V: Add a basic defconfig	Karsten Merker
2017-09-26	RISC-V: Build Infrastructure	Palmer Dabbelt