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path: root/arch/powerpc/mm/tlb_nohash_low.S
AgeCommit message (Expand)Author
2012-11-15powerpc/47x: Use the new ppc-opcode infrastructureTony Breeds
2012-07-10powerpc: Enforce usage of RA 0-R31 where possibleMichael Neuling
2012-07-10powerpc: Fixes for instructions not using correct register namingMichael Neuling
2012-07-10powerpc: Fix usage of register macros getting ready for %r0 changeMichael Neuling
2011-02-02powerpc/476: Workaround for PLB6 hangDave Kleikamp
2010-10-14powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chipsKumar Gala
2010-08-23powerpc/47x: Add an isync before the tlbivax instructionDave Kleikamp
2010-05-17powerpc/fsl-booke: Move loadcam_entry back to asm code to fix SMP ftraceKumar Gala
2010-05-05powerpc/47x: Base ppc476 supportDave Kleikamp
2009-08-24powerpc/booke: Move MMUCSR definition into mmu-book3e.hKumar Gala
2009-08-20powerpc: Add TLB management code for 64-bit Book3EBenjamin Herrenschmidt
2009-08-20powerpc/mm: Make low level TLB flush ops on BookE take additional argsBenjamin Herrenschmidt
2009-04-23powerpc: fix for long standing bug noticed by gcc 4.4.0Stephen Rothwell
2009-04-23Revert "powerpc: Add support for early tlbilx opcode"Kumar Gala
2009-04-07powerpc: Add support for early tlbilx opcodeKumar Gala
2009-03-09powerpc/fsl-booke: Add support for tlbilx instructionsKumar Gala
2008-12-21powerpc/44x: No need to mask MSR:CE, ME or DE in _tlbil_va on 440Benjamin Herrenschmidt
2008-12-21powerpc/mm: Split low level tlb invalidate for nohash processorsBenjamin Herrenschmidt
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