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power5+-pmu.c
Age
Commit message (
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Author
2009-10-28
powerpc: perf_event: Enable SDAR in continous sample mode
Anton Blanchard
2009-09-21
perf: Do the big rename: Performance Counters -> Performance Events
Ingo Molnar
2009-08-06
perf_counter/powerpc: Check oprofile_cpu_type for NULL before using it
Benjamin Herrenschmidt
2009-06-18
perf_counter: powerpc: Change how processor-specific back-ends get selected
Paul Mackerras
2009-06-18
perf_counter: powerpc: Use unsigned long for register and constraint values
Paul Mackerras
2009-06-11
perf_counter: Rename L2 to LL cache
Peter Zijlstra
2009-06-11
perf_counter: Standardize event names
Peter Zijlstra
2009-06-11
perf_counter: powerpc: Implement generalized cache events for POWER processors
Paul Mackerras
2009-06-03
perf_counter: powerpc: Fix event alternative code generation on POWER5/5+
Paul Mackerras
2009-05-15
perf_counter: powerpc: supply more precise information on counter overflow ev...
Paul Mackerras
2009-05-15
perf_counter: powerpc: use u64 for event codes internally
Paul Mackerras
2009-04-29
perf_counter: powerpc: allow use of limited-function counters
Paul Mackerras
2009-04-08
perf_counter: powerpc: set sample enable bit for marked instruction events
Paul Mackerras
2009-03-06
perfcounters/powerpc: add support for POWER5+ processors
Paul Mackerras