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Age	Commit message (Expand)	Author
2016-10-05	MIPS: pm-cps: Generate idle state entry code when CPUs are onlined	Paul Burton
2016-10-04	MIPS: pm-cps: Support CM3 changes to Coherence Enable Register	Matt Redfearn
2016-10-04	MIPS: pm-cps: Add MIPSr6 CPU support	Matt Redfearn
2016-10-04	MIPS: pm-cps: Remove selection of sync types	Matt Redfearn
2016-10-04	MIPS: pm-cps: Use MIPS standard completion barrier	Matt Redfearn
2016-10-04	MIPS: pm-cps: Use MIPS standard lightweight ordering barrier	Matt Redfearn
2016-10-04	MIPS: pm-cps: Update comments on barrier instructions	Matt Redfearn
2016-10-04	MIPS: pm-cps: Change FSB workaround to CPU blacklist	Matt Redfearn
2016-08-04	tree-wide: replace config_enabled() with IS_ENABLED()	Masahiro Yamada
2016-05-13	MIPS: pm-cps: Avoid offset overflow on MIPSr6	Markos Chandras
2016-04-03	MIPS: Fix misspellings in comments.	Adam Buchbinder
2015-08-26	MIPS: Add cases for CPU_I6400	Markos Chandras
2014-07-30	MIPS: {pm,smp}-cps: use cpu_vpe_id macro	Paul Burton
2014-07-30	MIPS: pm-cps: Prevent use of mips_cps_* without CPS SMP	Paul Burton
2014-06-16	MIPS: pm-cps: convert smp_mb__*()	Paul Burton
2014-05-28	MIPS: pm-cps: add PM state entry code for CPS systems	Paul Burton