summaryrefslogtreecommitdiff
path: root/arch/mips/include/asm/cpu-features.h
AgeCommit message (Expand)Author
2014-03-26MIPS: asm: cpu: Add cpu flag for Enhanced Virtual AddressingMarkos Chandras
2014-03-26MIPS: Detect the MSA ASEPaul Burton
2014-01-22MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill
2014-01-22MIPS: features: Add initial support for TLBINVF capable coresLeonid Yegoshin
2013-09-24MIPS: cpu-features.h: s/MIPS53/MIPS64/Maciej W. Rozycki
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle
2013-08-05MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code.Ralf Baechle
2013-07-01MIPS: Cleanup indentation and whitespaceTony Wu
2013-07-01MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPSDavid Daney
2013-07-01MIPS: Get rid of MIPS I flag and test macros.Ralf Baechle
2013-05-08MIPS: Build uasm-generated code only once to avoid CPU Hotplug problemHuacai Chen
2013-02-21Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle
2013-02-19MIPS: Probe for and report hardware virtualization support.David Daney
2013-02-17MIPS: Add support for the M14KEc core.Steven J. Hill
2013-02-15MIPS: Add printing of ISA version in cpuinfo.Steven J. Hill
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle
2012-10-11MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill
2012-10-11MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper
2012-09-13MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.Steven J. Hill
2012-09-13MIPS: Add base architecture support for RI and XI.Steven J. Hill
2010-08-05MIPS: Update comment for cpu_has_clo_clzRalf Baechle
2010-02-27MIPS: Implement Read Inhibit/eXecute InhibitDavid Daney
2010-02-02MIPS: 64-bit: Detect virtual memory sizeGuenter Roeck
2009-09-17MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.David Daney
2009-06-17MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.David Daney
2009-06-17MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.David Daney
2009-05-14MIPS: Enable CLO / CLZ instructions via separate CPU propertyRalf Baechle
2009-01-11MIPS: Hook Cavium OCTEON cache init into cache.cDavid Daney
2008-10-30MIPS: New feature test macro cpu_has_mips_rRalf Baechle
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle