| Age | Commit message (Expand) | Author |
|---|---|---|
| 2013-04-03 | ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead | Will Deacon |
| 2013-02-16 | ARM: 7650/1: mm: replace direct access to mm->context.id with new macro | Ben Dooks |
| 2012-11-09 | ARM: mm: introduce present, faulting entries for PAGE_NONE | Will Deacon |
| 2012-11-09 | ARM: mm: introduce L_PTE_VALID for page table entries | Will Deacon |
| 2012-11-09 | ARM: mm: don't use the access flag permissions mechanism for classic MMU | Will Deacon |
| 2012-07-09 | ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process | Will Deacon |
| 2012-04-17 | ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs | Catalin Marinas |
| 2012-04-17 | ARM: Use TTBR1 instead of reserved context ID | Will Deacon |
| 2011-12-08 | ARM: LPAE: Factor out classic-MMU specific code into proc-v7-2level.S | Catalin Marinas |
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