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path: root/arch/arm/mach-omap2/sram34xx.S
AgeCommit message (Expand)Author
2009-12-11OMAP3: SDRC: Place SDRC AC timing and MR changes in CORE DVFS SRAM code behin...Paul Walmsley
2009-07-24OMAP3 SDRC: Move the clk stabilization delay to the right placeRajendra Nayak
2009-07-24OMAP3 SDRC: Fix freeze when scaling CORE dpll to < 83MhzRajendra Nayak
2009-07-24OMAP2/3 SDRC: don't set SDRC_POWER.PWDENA on bootPaul Walmsley
2009-07-24OMAP3 SDRC: add support for 2 SDRAM chip selectsJean Pihet
2009-06-19OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLLPaul Walmsley
2009-06-19OMAP3: Add support for DPLL3 divisor values higher than 2Tero Kristo
2009-06-19OMAP3 SRAM: convert SRAM code to use macros rather than magic numbersPaul Walmsley
2009-06-19OMAP3 SRAM: add more comments on the SRAM codePaul Walmsley
2009-06-19OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock changePaul Walmsley
2009-06-19OMAP3 clock: add a short delay when lowering CORE clk ratePaul Walmsley
2009-06-19OMAP3 clock: remove wait for DPLL3 M2 clock to stabilizePaul Walmsley
2009-05-12OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHzPaul Walmsley
2009-05-12OMAP3 SRAM: renumber registers to make space for argument passingPaul Walmsley
2009-05-12OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency changePaul Walmsley
2009-05-12OMAP3 clock: add interconnect barriers to CORE DPLL M2 changePaul Walmsley
2009-05-12OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpllPaul Walmsley
2008-10-09ARM: OMAP3: Add minimal omap3430 supportSyed Mohammed, Khasim
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