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2019-07-05i2c: i801: Documentation updateJean Delvare
The i2c-i801 driver documentation needs some dusting: * Mention disable_features flag 0x20. * The i2c_ec driver has been removed from the kernel long ago. Driver i2c-scmi serves the same purpose for more recent hardware. * Replace obsolete /proc paths with equivalent /sys paths. Signed-off-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-07-05i2c: i801: Add support for Intel Tiger LakeJarkko Nikula
Add SMBUS PCI ID for Intel Tiger Lake -LP. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-06-21i2c: i801: Add support for Intel Elkhart LakeJarkko Nikula
Add PCI ID for Intel Elkhart Lake PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-06-21i2c: i801: Add Block Write-Block Read Process Call supportAlexander Sverdlin
Add SMBUS 2.0 Block Write-Block Read Process Call command support. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-05-03i2c-piix4: Add Hygon Dhyana SMBus supportPu Wen
The Hygon Dhyana CPU has the SMBus device with PCI device ID 0x790b, which is the same as AMD CZ SMBus device. So add Hygon Dhyana support to the i2c-piix4 driver by using the code path of AMD. Signed-off-by: Pu Wen <puwen@hygon.cn> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-05-03Merge branch 'i2c-mux/for-next' of https://github.com/peda-r/i2c-mux into ↵Wolfram Sang
i2c/for-5.2 Mainly some pca954x work, i.e. removal of unused platform data support and added support for sysfs interface for manipulating/examining the idle state. And then a mechanical cocci-style patch.
2019-03-25i2c: Add drivers for the AMD PCIe MP2 I2C controllerElie Morisse
MP2 controllers have two separate busses, so may accommodate up to two I2C adapters. Those adapters are listed in the ACPI namespace with the "AMDI0011" HID, and probed by a platform driver. Communication with the MP2 takes place through MMIO registers, or through DMA for more than 32 bytes transfers. This is major rework of the patch submitted by Nehal-bakulchandra Shah from AMD (https://patchwork.kernel.org/patch/10597369/). Most of the event handling of v3 was rewritten to make it work with more than one bus (e.g on Ryzen-based Lenovo Yoga 530), and this version contains many other improvements. Signed-off-by: Elie Morisse <syniurge@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2019-03-20i2c: i801: Add support for Intel Comet LakeJarkko Nikula
Add PCI ID for Intel Comet Lake PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-11-09i2c: add i2c bus driver for NVIDIA GPUAjay Gupta
Latest NVIDIA GPU card has USB Type-C interface. There is a Type-C controller which can be accessed over I2C. This driver adds I2C bus driver to communicate with Type-C controller. I2C client driver will be part of USB Type-C UCSI driver. Signed-off-by: Ajay Gupta <ajayg@nvidia.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [wsa: kept Makefile sorting] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-08-24i2c: ocores: update my email addressPeter Korsgaard
The old @sunsite.dk address is no longer active, so update the references. Signed-off-by: Peter Korsgaard <peter@korsgaard.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-07-03i2c: i801: Add support for Intel Ice LakeMika Westerberg
Intel Ice Lake has the same SMBus host controller than Intel Cannon Lake. Add the PCI ID to the drivers list of supported devices. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> [jarkko.nikula@linux.intel.com: Add entries to Documentation and Kconfig] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-07-03i2c: i801: Consolidate chipset names in documentation and KconfigJarkko Nikula
Make list of supported chipsets a little bit shorter by consolidating names that belong to the same family. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-06-14Merge branch 'i2c/for-4.18' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: - mainly feature additions to drivers (stm32f7, qup, xlp9xx, mlxcpld, ...) - conversion to use the i2c_8bit_addr_from_msg macro consistently - move includes to platform_data - core updates to allow the (still in review) I3C subsystem to connect - and the regular share of smaller driver updates * 'i2c/for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (68 commits) i2c: qup: fix building without CONFIG_ACPI i2c: tegra: Remove suspend-resume i2c: imx-lpi2c: Switch to SPDX identifier i2c: mxs: Switch to SPDX identifier i2c: busses: make use of i2c_8bit_addr_from_msg i2c: algos: make use of i2c_8bit_addr_from_msg i2c: rcar: document R8A77980 bindings i2c: qup: Add command-line parameter to override SCL frequency i2c: qup: Correct duty cycle for FM and FM+ i2c: qup: Add support for Fast Mode Plus i2c: qup: add probe path for Centriq ACPI devices i2c: robotfuzz-osif: drop pointless test i2c: robotfuzz-osif: remove pointless local variable i2c: rk3x: Don't print visible virtual mapping MMIO address i2c: opal: don't check number of messages in the driver i2c: ibm_iic: don't check number of messages in the driver i2c: imx: Switch to SPDX identifier i2c: mux: pca954x: merge calls to of_match_device and of_device_get_match_data i2c: mux: demux-pinctrl: use proper parent device for demux adapter i2c: mux: improve error message for failed symlink ...
2018-05-29i2c: ocores: update HDL sources URLFederico Vaga
The URL is broken. This patch fixes it. Signed-off-by: Federico Vaga <federico.vaga@vaga.pv.it> [wsa: shortened the URL a bit] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-05-17Merge branch 'i2c/platform_data-immutable' into i2c/for-4.18Wolfram Sang
2018-05-17i2c: ocores: move header to platform_dataWolfram Sang
This header only contains platform_data. Move it to the proper directory. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Lee Jones <lee.jones@linaro.org>
2018-04-30i2c: mlxcpld: Add capability register description to documentationMichael Shych
It adds capability register description to documentation. Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2018-02-21i2c: i801: Add missing documentation entries for Braswell and Kaby LakeJarkko Nikula
Commits adding PCI IDs for Intel Braswell and Kaby Lake PCH-H lacked the respective Kconfig and Documentation/i2c/busses/i2c-i801 change. Add them now. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-10-05i2c: i801: Add support for Intel Cedar ForkJarkko Nikula
Add PCI ID for Intel Cedar Fork PCH. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-06-19i2c: i801: Add support for Intel Cannon LakeSrinivas Pandruvada
Added SMBUS PCI Ids for SMBUS for Cannon Lake PCH. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> [jarkko.nikula@linux.intel.com: Add entries to Documentation and Kconfig. Cover Cannon Lake-H too] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2017-02-09i2c: i801: Add support for Intel Gemini LakeMika Westerberg
Intel Gemini Lake has the same SMBus host controller than Intel Broxton. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-11-24i2c: mlxcpld: add master driver for mellanox systemsVadim Pasternak
Device driver for Mellanox I2C controller logic, implemented in Lattice CPLD device. Device supports: - Master mode - One physical bus - Polling mode The Kconfig currently controlling compilation of this code is: drivers/i2c/busses/Kconfig:config I2C_MLXCPLD Signed-off-by: Michael Shych <michaelsh@mellanox.com> Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Reviewed-by: Jiri Pirko <jiri@mellanox.com> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-11-20i2c: i801: add Intel Lewisburg device IDsAlexandra Yates
Adding Intel codename Lewisburg platform device IDs for SMBus. Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-10-26i2c: i801: Document Intel DNV and BroxtonJarkko Nikula
Add missing entries into i2c-i801 documentation and Kconfig about recently added Intel DNV and Broxton. Reported-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-08-10i2c: parport: Add VCT-jig adapterOndrej Zary
Add support for VCT-jig parallel port I2C adapter to i2c-parport. The adapter schematic can be found here (in the RAR file): http://remont-aud.net/shop/22/desc/vct-jig-komplekt-dlja-samostojatelnoj-sborki Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-11-12i2c: i801: Add DeviceIDs for SunrisePoint LPDevin Ryles
Signed-off-by: Devin Ryles <devin.ryles@intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-10-16i2c: i801: Add Device IDs for Intel Sunrise Point PCHjames.d.ralston@intel.com
This patch adds the I2C/SMBus Device IDs for the Intel Sunrise Point PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-07-17i2c: i801: Add device ID for Intel Wildcat Point PCHJean Delvare
Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-03-09i2c: i801: enable Intel BayTrail SMBUSChew, Kean ho
Add Device ID of Intel BayTrail SMBus Controller. Signed-off-by: Chew, Kean ho <kean.ho.chew@intel.com> Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-01-29Merge branch 'i2c/for-current' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull more i2c updates from Wolfram Sang: "Mostly bugfixes, small but wanted cleanups, and Paul's init.h removal applied" * 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: rcar: fix NACK error code i2c: update i2c_algorithm documentation i2c: rcar: use devm_clk_get to ensure clock is properly ref-counted i2c: rcar: do not print error if device nacks transfer i2c: rely on driver core when sanitizing devices i2c: delete non-required instances of include <linux/init.h> i2c: acorn: is tristate and should use module.h i2c: piix4: Standardize log messages i2c: piix4: Use different message for AMD Auxiliary SMBus Controller i2c: piix4: Add support for AMD ML and CZ SMBus changes
2014-01-29Update Jean Delvare's e-mail addressJean Delvare
Signed-off-by: Jean Delvare <khali@linux-fr.org>
2014-01-24i2c: piix4: Add support for AMD ML and CZ SMBus changesShane Huang
The locations of SMBus register base address and enablement bit are changed from AMD ML, which need this patch to be supported. Signed-off-by: Shane Huang <shane.huang@amd.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@vger.kernel.org
2013-11-14i2c: i801: Add Device IDs for Intel Wildcat Point-LP PCHJames Ralston
This patch adds the SMBus Device IDs for the Intel Wildcat Point-LP PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-08-15i2c: piix4: Add support for secondary SMBus on AMD SB800 and AMD FCH chipsetsRudolf Marek
Add support for the secondary SMBus controller on the AMD SB800 and AMD FCH chipsets. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Tested-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-07-04Merge branch 'i2c/for-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: - new drivers: Kontron PLD, Wondermedia VT - mv64xxx driver gained sun4i support and a bigger cleanup - duplicate driver 'intel-mid' removed - added generic device tree binding for sda holding time (and designware driver already uses it) - we tried to allow driver probing with only device tree and no i2c ids, but I had to revert it because of side effects. Needs some rethinking. - driver bugfixes, cleanups... * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (34 commits) i2c-designware: use div_u64 to fix link i2c: Kontron PLD i2c bus driver i2c: iop3xxx: fix build failure after waitqueue changes i2c-designware: make SDA hold time configurable i2c: mv64xxx: Set bus frequency to 100kHz if clock-frequency is not provided i2c: imx: allow autoloading on dt ids i2c: mv64xxx: Fix transfer error code i2c: i801: SMBus patch for Intel Coleto Creek DeviceIDs i2c: omap: correct usage of the interrupt enable register i2c-pxa: prepare clock before use Revert "i2c: core: make it possible to match a pure device tree driver" i2c: nomadik: allocate adapter number dynamically i2c: nomadik: support elder Nomadiks i2c: mv64xxx: Add Allwinner sun4i compatible i2c: mv64xxx: make the registers offset configurable i2c: mv64xxx: Add macros to access parts of registers i2c: vt8500: Add support for I2C bus on Wondermedia SoCs i2c: designware: fix race between subsequent xfers i2c: bfin-twi: Read and write the FIFO in loop i2c: core: make it possible to match a pure device tree driver ...
2013-06-20i2c: i801: SMBus patch for Intel Coleto Creek DeviceIDsSeth Heasley
This patch adds the i801 SMBus Controller DeviceIDs for the Intel Coleto Creek PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-06-03i2c-piix4: Add AMD CZ SMBus device IDShane Huang
To add AMD CZ SMBus controller device ID. [bhelgaas: drop pci_ids.h update] Signed-off-by: Shane Huang <shane.huang@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Tejun Heo <tj@kernel.org> Reviewed-by: Jean Delvare <khali@linux-fr.org> Cc: stable@vger.kernel.org
2013-03-22i2c: Fix my e-mail address in drivers and documentationGuenter Roeck
My old e-mail address is no longer working. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-02-15i2c: i801: Add Device IDs for Intel Wellsburg PCHJames Ralston
This patch adds the SMBus Device IDs for the Intel Wellsburg PCH Signed-off-by: James Ralston <james.d.ralston@intel.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
2013-02-11i2c: sis630: Add SIS964 supportAmaury Decrême
Signed-off-by: Amaury Decrême <amaury.decreme@gmail.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
2013-02-10i2c: Adding support for Intel iSMT SMBus 2.0 host controllerNeil Horman
The iSMT (Intel SMBus Message Transport) supports multi-master I2C/SMBus, as well as IPMI. It's operation is DMA-based and utilizes descriptors to initiate transactions on the bus. The iSMT hardware can act as both a master and a target, although this driver only supports being a master. Signed-off-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Bill Brown <bill.e.brown@intel.com> Tested-by: Seth Heasley <seth.heasley@intel.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
2013-02-08i2c: i801: SMBus patch for Intel Avoton DeviceIDsSeth Heasley
This patch adds the PCU SMBus DeviceID for the Intel Avoton SOC. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-10-05i2c-viapro: Add VIA VX900 device IDJean Delvare
The SMBus controller in the VIA VX900 appears to be compatible with the VIA VX855, so just add the device ID. This closes kernel bug #43096. Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-09-10i2c-i801: Add Device IDs for Intel Lynx Point-LP PCHJames Ralston
Add the SMBus Device IDs for the Intel Lynx Point-LP PCH. Signed-off-by: James Ralston <james.d.ralston@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-i801: Enable IRQ for SMBus transactionsDaniel Kurtz
Add a new 'feature' to i2c-i801 to enable using PCI interrupts. When the feature is enabled, then an isr is installed for the device's PCI IRQ. An I2C/SMBus transaction is always terminated by one of the following interrupt sources: FAILED, BUS_ERR, DEV_ERR, or on success: INTR. When the isr fires for one of these cases, it sets the ->status variable and wakes up the waitq. The waitq then saves off the status code, and clears ->status (in preparation for some future transaction). The SMBus controller generates an INTR irq at the end of each transaction where INTREN was set in the HST_CNT register. No locking is needed around accesses to priv->status since all writes to it are serialized: it is only ever set once in the isr at the end of a transaction, and cleared while no interrupts can occur. In addition, the I2C adapter lock guarantees that entire I2C transactions for a single adapter are always serialized. For this patch, the INTREN bit is set only for SMBus block, byte and word transactions, but not for I2C reads or writes. The use of the DS (BYTE_DONE) interrupt with byte-by-byte I2C transactions is implemented in a subsequent patch. The interrupt feature has only been enabled for COUGARPOINT hardware. In addition, it is disabled if SMBus is using the SMI# interrupt. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-piix4: Support AMD auxiliary SMBus controllerAndrew Armenia
Some AMD chipsets, such as the SP5100, have an auxiliary SMBus controller with a second set of registers. This patch adds support for this auxiliary controller. Tested on ASUS KCMA-D8 motherboard. Signed-off-by: Andrew Armenia <andrew@asquaredlabs.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-03-30Documentation: remove references to /etc/modprobe.confLucas De Marchi
Usage of /etc/modprobe.conf file was deprecated by module-init-tools and is no longer parsed by new kmod tool. References to this file are replaced in Documentation, comments and Kconfig according to the context. There are also some references to the old /etc/modules.conf from 2.4 kernels that are being removed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi> Acked-by: Takashi Iwai <tiwai@suse.de> Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-03-26i2c-i801: Add device IDs for Intel Lynx PointSeth Heasley
Add the SMBus controller device IDs for the Intel Lynx Point PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2011-05-24i2c-i801: SMBus patch for Intel Panther Point DeviceIDsSeth Heasley
This patch adds the SMBus controller DeviceID for the Intel Panther Point PCH. Signed-off-by: Seth Heasley <seth.heasley@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2011-03-31Fix common misspellingsLucas De Marchi
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-15 03:51:34 +0000