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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2017-05-18 11:23:06 +0300
committerWolfram Sang <wsa@the-dreams.de>2017-06-19 16:17:41 +0200
commit09a1de04d59870b34b2a8106671c7bdea4ca9a90 (patch)
treeccee19329c031c06ceaa8f0ad4839e317ce35aed /Documentation/i2c/busses
parent063345aede9905beb9b73129da7a0e9d5933b078 (diff)
i2c: i801: Add support for Intel Cannon Lake
Added SMBUS PCI Ids for SMBUS for Cannon Lake PCH. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> [jarkko.nikula@linux.intel.com: Add entries to Documentation and Kconfig. Cover Cannon Lake-H too] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation/i2c/busses')
-rw-r--r--Documentation/i2c/busses/i2c-i8012
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801
index 820d9040de16..0500193434cb 100644
--- a/Documentation/i2c/busses/i2c-i801
+++ b/Documentation/i2c/busses/i2c-i801
@@ -34,6 +34,8 @@ Supported adapters:
* Intel Broxton (SOC)
* Intel Lewisburg (PCH)
* Intel Gemini Lake (SOC)
+ * Intel Cannon Lake-H (PCH)
+ * Intel Cannon Lake-LP (PCH)
Datasheets: Publicly available at the Intel website
On Intel Patsburg and later chipsets, both the normal host SMBus controller