Age | Commit message (Expand) | Author |
---|---|---|
2019-10-23 | dt-bindings: riscv: Fix CPU schema errors | Rob Herring |
2019-08-08 | dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed... | Paul Walmsley |
2019-08-08 | dt-bindings: riscv: remove obsolete cpus.txt | Paul Walmsley |
2019-08-08 | dt-bindings: Update the riscv,isa string description | Atish Patra |
2019-07-20 | dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodes | Rob Herring |
2019-06-26 | dt-bindings: riscv: resolve 'make dt_binding_check' warnings | Paul Walmsley |
2019-06-17 | dt-bindings: riscv: convert cpu binding to json-schema | Paul Walmsley |
2019-06-17 | dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 | Paul Walmsley |
2019-05-16 | RISC-V: Add DT documentation for SiFive L2 Cache Controller | Yash Shah |
2017-09-25 | dt-bindings: RISC-V CPU Bindings | Palmer Dabbelt |