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2017-06-20crypto: inside-secure - use the base_end pointer in ring rollbackAntoine Ténart
A base_end pointer is set and provided. Use it in the ring rollback function to avoid using build-in defines. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - increase the batch sizeAntoine Ténart
Increase the batch size to the maximum number of requests a ring can handle at a time (its size). This is possible now that the request queues are per hw ring. This improves performances. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - only dequeue when neededAntoine Ténart
This force the need_dequeue flag to be unset whenever the dequeue function is called, to avoid calling it when it is not necessary. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - get the backlog before dequeueing the requestAntoine Ténart
Get the backlog before dequeuing the request otherwise we'll miss the first request in line. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - stop requeueing failed requestsAntoine Ténart
This update the dequeue function of the inside-secure safexcel driver so that failed requests aren't requeued when they fail (for whatever reason, which can be because the hw ring is full). Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - use one queue per hw ringAntoine Ténart
Update the inside-secure safexcel driver from using one global queue to one queue per hw ring. This ease the request management and keep the hw in sync with what's done in sw. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - update the context and request laterAntoine Ténart
This move the context and request updates at the end of the cipher and hash send() functions. This way the context and request fields are set only when everything else was successful in the send() functions. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - align the cipher and hash send functionsOfer Heifetz
The cipher and hash send functions both set the results variable, to be used later by the caller. Align the way they're setting this variable. Signed-off-by: Ofer Heifetz <oferh@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - optimize DSE bufferability controlIgal Liberman
Configure the data write bufferability to always buffer packets in the DSE. This change slightly improves performance. Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - enable single WR in DSE configurationIgal Liberman
When enable_single_wr is not enabled, the DSE will only write those parts of a result descriptor that need updating, which means a final result descriptor will be written in 2 or 3 smaller transfers. When enable_single_wr is enabled the DSE will combine these 2-3 updates into one large write transfer, generally improving performance. Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - fix incorrect DSE data cache settingAntoine Ténart
Set the correct value to the DSE data cache, using WR_CACHE_3BITS instead of RD_CACHE_3BITS. This fixes an incorrect setting and helps improving performances. Reported-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - fix the ring wr_cache offsetAntoine Ténart
The EIP197_HIA_xDR_CFG_WR_CACHE macro was defined to use an offset of 23, which is wrong as it's actually 25. Fix this. Reported-by: Igal Liberman <igall@marvell.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: inside-secure - use hmac ipad/opad constantsAntoine Ténart
Replace the hmac ipad/opad values by their defined constants. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Select device in Round Robin fashionHarsh Jain
When multiple devices are present in system select device in round-robin fashion for crypto operations Signed-off-by: Atul Gupta <atul.gupta@chelsio.com> Reviewed-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Ensure Destination sg entry size less than 2kHarsh Jain
Allocate new sg list in case received destination sg list has entry greater that 2k. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20MAINTAINERS: Add maintainer for chelsio crypto driverHarsh Jain
Add myself as maintainer for chcr. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20chcr - Add debug countersHarsh Jain
Count types of operation done by HW. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Add ctr mode and process large sg entries for cipherHarsh Jain
It send multiple WRs to H/W to handle large sg lists. Adds ctr(aes) and rfc(ctr(aes)) modes. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Avoid changing request structureHarsh Jain
Do not update assoclen received in aead_request. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Return correct error codeHarsh Jain
Return correct error instead of EINVAL. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Fix fallback key settingHarsh Jain
Set key of fallback tfm for rfc4309. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: chcr - Pass lcb bit setting to firmwareHarsh Jain
GCM and CBC mode of operation requires Last Cipher Block. This patch set lcb bit in WR header when required. Signed-off-by: Harsh Jain <harsh@chelsio.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: cavium - fix spelling mistake "Revsion" -> "Revision"Colin Ian King
Trivial fix to spelling mistake in seq_printf message Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: omap-aes - fix spelling mistake "Encryptio" -> "Encryption"Colin Ian King
Trivial fix to spelling mistake in pr_err message Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: testmgr - add testvector for pkcs1pad(rsa)Stephan Mueller
The PKCS#1 RSA implementation is provided with a self test with RSA 2048 and SHA-256. This self test implicitly covers other RSA keys and other hashes. Also, this self test implies that the pkcs1pad(rsa) is FIPS 140-2 compliant. Signed-off-by: Stephan Mueller <smueller@chronox.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20MAINTAINERS: add entry for MediaTek Random Number GeneratorSean Wang
I work for MediaTek on maintaining the MediaTek RNG driver for the existing SoCs and adding support for the following SoCs. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20hwrng: mtk - add runtime PM supportSean Wang
Add runtime PM support. There will be the benefit on SoCs where the clock to the RNG used can be shutdown. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20dt-bindings: rng: add MediaTek MT7622 Hardware Random Generator bindingsSean Wang
Document the bindings used by MediaTek MT7622 SoC hardware random number generator. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: rsa-pkcs1pad - use constant time memory comparison for MACsJason A. Donenfeld
Otherwise, we enable all sorts of forgeries via timing attack. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Suggested-by: Stephan Müller <smueller@chronox.de> Cc: stable@vger.kernel.org Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: linux-crypto@vger.kernel.org Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-20crypto: crypto4xx - fix an error codeChristophe Jaillet
If 'kzalloc' fails, we return 0 which means success. return -ENOMEM instead as already done a few lines above. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: engine - replace pr_xxx by dev_xxxCorentin LABBE
By adding a struct device *dev to struct engine, we could store the device used at register time and so use all dev_xxx functions instead of pr_xxx. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: testmgr - use consistent format for errorsGilad Ben-Yossef
Fix inconsistent format and spelling in hash tests error messages. Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: brcm - fix spelling mistake: "fallbck" -> "fallback"Colin Ian King
Trivial fix to spelling mistake in flow_log message Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Steve Lin <steven.lin1@broadcom.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - fix large block size supportAntoine Ténart
The run-time self-tests fail quite early, as soon as the input block size is larger than 64 bytes: alg: hash: Test 4 failed for sha1-sun4i-ss 00000000: b9 c9 1e 52 c0 26 d8 39 81 ff f2 3c 99 b1 27 b2 00000010: 30 d6 c9 85 One thing to notice is the value of the last word, which is the one expected (it can sometime be the last two words). The datasheet isn't very clear about when the digest is ready to retrieve and is seems the bit SS_DATA_END is cleared when the digest was computed *but* that doesn't mean the digest is ready to retrieve in the registers. A ndelay(1) is added before reading the computed digest to ensure it is available in the SS_MD[] registers. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - add the CRYPTO_ALG_KERN_DRIVER_ONLY flagAntoine Ténart
The CRYPTO_ALG_KERN_DRIVER_ONLY flag is set for hardware accelerated ciphers accessible through a kernel driver only. This is the case for ciphers exposed by the sun4i-ss driver. This patch sets this flag. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - move from ablkcipher to skcipher APIAntoine Ténart
Update the sun4i-ss driver to use the skcipher API instead of the old ablkcipher one. It's a bit more tricky than s/ablkcipher/skcipher/, but still nothing special and the driver's logic stays the same. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - use GENMASK to generate masksAntoine Ténart
Use the GENMASK helper instead of custom calculations to generate masks, It also helps the readability. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - simplify the appended bit assignmentAntoine Ténart
A bit is appended at the end of the input buffer for sha1. Simplify the code assigning it. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - simplify the pad length calculationAntoine Ténart
When sending the last block of data to the engine, it should be padded so that the total length of the request can be given to the engine as the last 2 words of the last 64 bytes block. Simplify the calculation of this pad offset. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - do not dynamically set parts of the last buffer to 0Antoine Ténart
Parts of the bf buffer were dynamically set to 0. Change this to set the whole buffer to 0 by default to avoid any mistake. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - cannot use DMA is the request is 0 lengthAntoine Ténart
Do not use DMA is the request is 0 length. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - use lower/upper_32_bits helpersAntoine Ténart
Replace custom bit shifts and masks with lower/upper_32_bits helpers. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - remove conditional checks against 0Antoine Ténart
Cosmetic clean up if conditional checks on 0s values. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: sun4i-ss - group variable definitions in sun4i_hash()Antoine Ténart
Cosmetic change to avoid having a full screen a variable definitions. It also helps to see which variables share the same type. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: algapi - Use pr_err common logging style.Karim Eshapa
Use more common error logging style. Signed-off-by: Karim Eshapa <karim.eshapa@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: doc - Fixed bugs, added example usage of calc_hash().Kamil Konieczny
- Fixed bugs in example for shash and rng (added missing "*" and " *"). - Corrected pr_info() in calc_hash(). - Added example usage of calc_hash(). - No need for negate PTR_ERR to get error code, as crypto_alloc_rng already returns negative values like ERR_PTR(-ENOMEM). Fixed. Signed-off-by: Kamil Konieczny <k.konieczny@partner.samsung.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: glue_helper - Delete some dead codeDan Carpenter
We checked (nbytes < bsize) inside the loops so it's not possible to hit the "goto done;" here. This code is cut and paste from other slightly different loops where we don't have the check inside the loop. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: aes_ti - fix comment for MixColumns stepEric Biggers
mix_columns() contains a comment which shows the matrix used by the MixColumns step of AES, but the last entry in this matrix was incorrect Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: mediatek - drop .owner field in mtk_crypto_driverGeliang Tang
Drop .owner field in mtk_crypto_driver, since platform_driver_register() will set it automatically. Signed-off-by: Geliang Tang <geliangtang@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-19crypto: cavium - Add more algorithmsGeorge Cherian
Add more algorithm support for the driver. Add support for ecb(aes), cfb(aes) and ecb(des3_ede). Signed-off-by: George Cherian <george.cherian@cavium.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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