diff options
Diffstat (limited to 'drivers/nfc')
| -rw-r--r-- | drivers/nfc/s3fwrn5/i2c.c | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/drivers/nfc/s3fwrn5/i2c.c b/drivers/nfc/s3fwrn5/i2c.c index 897394167522..38b8d6cab593 100644 --- a/drivers/nfc/s3fwrn5/i2c.c +++ b/drivers/nfc/s3fwrn5/i2c.c @@ -6,6 +6,7 @@ * Robert Baldyga <r.baldyga@samsung.com> */ +#include <linux/clk.h> #include <linux/i2c.h> #include <linux/gpio.h> #include <linux/delay.h> @@ -22,6 +23,7 @@ struct s3fwrn5_i2c_phy { struct phy_common common; struct i2c_client *i2c_dev; + struct clk *clk; unsigned int irq_skip:1; }; @@ -207,17 +209,40 @@ static int s3fwrn5_i2c_probe(struct i2c_client *client, if (ret < 0) return ret; + phy->clk = devm_clk_get_optional(&client->dev, NULL); + if (IS_ERR(phy->clk)) + return dev_err_probe(&client->dev, PTR_ERR(phy->clk), + "failed to get clock\n"); + + /* + * S3FWRN5 depends on a clock input ("XI" pin) to function properly. + * Depending on the hardware configuration this could be an always-on + * oscillator or some external clock that must be explicitly enabled. + * Make sure the clock is running before starting S3FWRN5. + */ + ret = clk_prepare_enable(phy->clk); + if (ret < 0) { + dev_err(&client->dev, "failed to enable clock: %d\n", ret); + return ret; + } + ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->i2c_dev->dev, &i2c_phy_ops); if (ret < 0) - return ret; + goto disable_clk; ret = devm_request_threaded_irq(&client->dev, phy->i2c_dev->irq, NULL, s3fwrn5_i2c_irq_thread_fn, IRQF_ONESHOT, S3FWRN5_I2C_DRIVER_NAME, phy); if (ret) - s3fwrn5_remove(phy->common.ndev); + goto s3fwrn5_remove; + return 0; + +s3fwrn5_remove: + s3fwrn5_remove(phy->common.ndev); +disable_clk: + clk_disable_unprepare(phy->clk); return ret; } @@ -226,6 +251,7 @@ static int s3fwrn5_i2c_remove(struct i2c_client *client) struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client); s3fwrn5_remove(phy->common.ndev); + clk_disable_unprepare(phy->clk); return 0; } |