diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 167 |
1 files changed, 83 insertions, 84 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 159d048fd7a6..9a916463919e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -88,7 +88,7 @@ nv4_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv04_fifo_new, .gr = nv04_gr_new, @@ -109,7 +109,7 @@ nv5_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv04_fifo_new, .gr = nv04_gr_new, @@ -131,7 +131,7 @@ nv10_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .gr = nv10_gr_new, }; @@ -151,7 +151,7 @@ nv11_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv10_fifo_new, .gr = nv15_gr_new, @@ -173,7 +173,7 @@ nv15_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv10_fifo_new, .gr = nv15_gr_new, @@ -195,7 +195,7 @@ nv17_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv17_gr_new, @@ -217,7 +217,7 @@ nv18_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv17_gr_new, @@ -239,7 +239,7 @@ nv1a_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv10_fifo_new, .gr = nv15_gr_new, @@ -261,7 +261,7 @@ nv1f_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv17_gr_new, @@ -283,7 +283,7 @@ nv20_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv20_gr_new, @@ -305,7 +305,7 @@ nv25_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv25_gr_new, @@ -327,7 +327,7 @@ nv28_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv25_gr_new, @@ -349,7 +349,7 @@ nv2a_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv2a_gr_new, @@ -371,7 +371,7 @@ nv30_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv30_gr_new, @@ -393,7 +393,7 @@ nv31_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv30_gr_new, @@ -416,7 +416,7 @@ nv34_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv34_gr_new, @@ -439,7 +439,7 @@ nv35_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv35_gr_new, @@ -461,7 +461,7 @@ nv36_chipset = { .mmu = { 0x00000001, nv04_mmu_new }, .pci = { 0x00000001, nv04_pci_new }, .timer = { 0x00000001, nv04_timer_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv17_fifo_new, .gr = nv35_gr_new, @@ -486,7 +486,7 @@ nv40_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv40_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -512,7 +512,7 @@ nv41_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -538,7 +538,7 @@ nv42_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -564,7 +564,7 @@ nv43_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -590,7 +590,7 @@ nv44_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -616,7 +616,7 @@ nv45_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -642,7 +642,7 @@ nv46_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -668,7 +668,7 @@ nv47_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -694,7 +694,7 @@ nv49_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -720,7 +720,7 @@ nv4a_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -746,7 +746,7 @@ nv4b_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv40_gr_new, @@ -772,7 +772,7 @@ nv4c_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -798,7 +798,7 @@ nv4e_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -827,7 +827,7 @@ nv50_chipset = { .therm = { 0x00000001, nv50_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv50_disp_new, + .disp = { 0x00000001, nv50_disp_new }, .dma = nv50_dma_new, .fifo = nv50_fifo_new, .gr = nv50_gr_new, @@ -853,7 +853,7 @@ nv63_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -879,7 +879,7 @@ nv67_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -905,7 +905,7 @@ nv68_chipset = { .therm = { 0x00000001, nv40_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = nv04_disp_new, + .disp = { 0x00000001, nv04_disp_new }, .dma = nv04_dma_new, .fifo = nv40_fifo_new, .gr = nv44_gr_new, @@ -936,7 +936,7 @@ nv84_chipset = { .volt = { 0x00000001, nv40_volt_new }, .bsp = { 0x00000001, g84_bsp_new }, .cipher = { 0x00000001, g84_cipher_new }, - .disp = g84_disp_new, + .disp = { 0x00000001, g84_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, @@ -968,7 +968,7 @@ nv86_chipset = { .volt = { 0x00000001, nv40_volt_new }, .bsp = { 0x00000001, g84_bsp_new }, .cipher = { 0x00000001, g84_cipher_new }, - .disp = g84_disp_new, + .disp = { 0x00000001, g84_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, @@ -1000,7 +1000,7 @@ nv92_chipset = { .volt = { 0x00000001, nv40_volt_new }, .bsp = { 0x00000001, g84_bsp_new }, .cipher = { 0x00000001, g84_cipher_new }, - .disp = g84_disp_new, + .disp = { 0x00000001, g84_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, @@ -1032,7 +1032,7 @@ nv94_chipset = { .volt = { 0x00000001, nv40_volt_new }, .bsp = { 0x00000001, g84_bsp_new }, .cipher = { 0x00000001, g84_cipher_new }, - .disp = g94_disp_new, + .disp = { 0x00000001, g94_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, @@ -1064,7 +1064,7 @@ nv96_chipset = { .volt = { 0x00000001, nv40_volt_new }, .bsp = { 0x00000001, g84_bsp_new }, .cipher = { 0x00000001, g84_cipher_new }, - .disp = g94_disp_new, + .disp = { 0x00000001, g94_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, @@ -1094,7 +1094,7 @@ nv98_chipset = { .therm = { 0x00000001, g84_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = g94_disp_new, + .disp = { 0x00000001, g94_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = g84_gr_new, @@ -1128,7 +1128,7 @@ nva0_chipset = { .volt = { 0x00000001, nv40_volt_new }, .bsp = { 0x00000001, g84_bsp_new }, .cipher = { 0x00000001, g84_cipher_new }, - .disp = gt200_disp_new, + .disp = { 0x00000001, gt200_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = gt200_gr_new, @@ -1160,7 +1160,7 @@ nva3_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, .ce = { 0x00000001, gt215_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = gt215_gr_new, @@ -1194,7 +1194,7 @@ nva5_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, .ce = { 0x00000001, gt215_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = gt215_gr_new, @@ -1227,7 +1227,7 @@ nva8_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, .ce = { 0x00000001, gt215_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = gt215_gr_new, @@ -1258,7 +1258,7 @@ nvaa_chipset = { .therm = { 0x00000001, g84_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = mcp77_disp_new, + .disp = { 0x00000001, mcp77_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = gt200_gr_new, @@ -1290,7 +1290,7 @@ nvac_chipset = { .therm = { 0x00000001, g84_therm_new }, .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, - .disp = mcp77_disp_new, + .disp = { 0x00000001, mcp77_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = mcp79_gr_new, @@ -1324,7 +1324,7 @@ nvaf_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, nv40_volt_new }, .ce = { 0x00000001, gt215_ce_new }, - .disp = mcp89_disp_new, + .disp = { 0x00000001, mcp89_disp_new }, .dma = nv50_dma_new, .fifo = g84_fifo_new, .gr = mcp89_gr_new, @@ -1360,7 +1360,7 @@ nvc0_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000003, gf100_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = gf100_dma_new, .fifo = gf100_fifo_new, .gr = gf100_gr_new, @@ -1396,7 +1396,7 @@ nvc1_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000001, gf100_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = gf100_dma_new, .fifo = gf100_fifo_new, .gr = gf108_gr_new, @@ -1432,7 +1432,7 @@ nvc3_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000001, gf100_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = gf100_dma_new, .fifo = gf100_fifo_new, .gr = gf104_gr_new, @@ -1468,7 +1468,7 @@ nvc4_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000003, gf100_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = gf100_dma_new, .fifo = gf100_fifo_new, .gr = gf104_gr_new, @@ -1504,7 +1504,7 @@ nvc8_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000003, gf100_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = gf100_dma_new, .fifo = gf100_fifo_new, .gr = gf110_gr_new, @@ -1540,7 +1540,7 @@ nvce_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000003, gf100_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = gf100_dma_new, .fifo = gf100_fifo_new, .gr = gf104_gr_new, @@ -1576,7 +1576,7 @@ nvcf_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000001, gf100_ce_new }, - .disp = gt215_disp_new, + .disp = { 0x00000001, gt215_disp_new }, .dma = gf100_dma_new, .fifo = gf100_fifo_new, .gr = gf104_gr_new, @@ -1611,7 +1611,7 @@ nvd7_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf117_volt_new }, .ce = { 0x00000001, gf100_ce_new }, - .disp = gf119_disp_new, + .disp = { 0x00000001, gf119_disp_new }, .dma = gf119_dma_new, .fifo = gf100_fifo_new, .gr = gf117_gr_new, @@ -1647,7 +1647,7 @@ nvd9_chipset = { .timer = { 0x00000001, nv41_timer_new }, .volt = { 0x00000001, gf100_volt_new }, .ce = { 0x00000001, gf100_ce_new }, - .disp = gf119_disp_new, + .disp = { 0x00000001, gf119_disp_new }, .dma = gf119_dma_new, .fifo = gf100_fifo_new, .gr = gf119_gr_new, @@ -1684,7 +1684,7 @@ nve4_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gk104_ce_new }, - .disp = gk104_disp_new, + .disp = { 0x00000001, gk104_disp_new }, .dma = gf119_dma_new, .fifo = gk104_fifo_new, .gr = gk104_gr_new, @@ -1721,7 +1721,7 @@ nve6_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gk104_ce_new }, - .disp = gk104_disp_new, + .disp = { 0x00000001, gk104_disp_new }, .dma = gf119_dma_new, .fifo = gk104_fifo_new, .gr = gk104_gr_new, @@ -1758,7 +1758,7 @@ nve7_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gk104_ce_new }, - .disp = gk104_disp_new, + .disp = { 0x00000001, gk104_disp_new }, .dma = gf119_dma_new, .fifo = gk104_fifo_new, .gr = gk104_gr_new, @@ -1820,7 +1820,7 @@ nvf0_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gk104_ce_new }, - .disp = gk110_disp_new, + .disp = { 0x00000001, gk110_disp_new }, .dma = gf119_dma_new, .fifo = gk110_fifo_new, .gr = gk110_gr_new, @@ -1856,7 +1856,7 @@ nvf1_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gk104_ce_new }, - .disp = gk110_disp_new, + .disp = { 0x00000001, gk110_disp_new }, .dma = gf119_dma_new, .fifo = gk110_fifo_new, .gr = gk110b_gr_new, @@ -1892,7 +1892,7 @@ nv106_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gk104_ce_new }, - .disp = gk110_disp_new, + .disp = { 0x00000001, gk110_disp_new }, .dma = gf119_dma_new, .fifo = gk208_fifo_new, .gr = gk208_gr_new, @@ -1928,7 +1928,7 @@ nv108_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gk104_ce_new }, - .disp = gk110_disp_new, + .disp = { 0x00000001, gk110_disp_new }, .dma = gf119_dma_new, .fifo = gk208_fifo_new, .gr = gk208_gr_new, @@ -1964,7 +1964,7 @@ nv117_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000005, gm107_ce_new }, - .disp = gm107_disp_new, + .disp = { 0x00000001, gm107_disp_new }, .dma = gf119_dma_new, .fifo = gm107_fifo_new, .gr = gm107_gr_new, @@ -1999,7 +1999,7 @@ nv118_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000005, gm107_ce_new }, - .disp = gm107_disp_new, + .disp = { 0x00000001, gm107_disp_new }, .dma = gf119_dma_new, .fifo = gm107_fifo_new, .gr = gm107_gr_new, @@ -2032,7 +2032,7 @@ nv120_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gm200_ce_new }, - .disp = gm200_disp_new, + .disp = { 0x00000001, gm200_disp_new }, .dma = gf119_dma_new, .fifo = gm200_fifo_new, .gr = gm200_gr_new, @@ -2068,7 +2068,7 @@ nv124_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gm200_ce_new }, - .disp = gm200_disp_new, + .disp = { 0x00000001, gm200_disp_new }, .dma = gf119_dma_new, .fifo = gm200_fifo_new, .gr = gm200_gr_new, @@ -2104,7 +2104,7 @@ nv126_chipset = { .top = { 0x00000001, gk104_top_new }, .volt = { 0x00000001, gk104_volt_new }, .ce = { 0x00000007, gm200_ce_new }, - .disp = gm200_disp_new, + .disp = { 0x00000001, gm200_disp_new }, .dma = gf119_dma_new, .fifo = gm200_fifo_new, .gr = gm200_gr_new, @@ -2163,7 +2163,7 @@ nv130_chipset = { .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000003f, gp100_ce_new }, .dma = gf119_dma_new, - .disp = gp100_disp_new, + .disp = { 0x00000001, gp100_disp_new }, .fifo = gp100_fifo_new, .gr = gp100_gr_new, .nvdec[0] = gm107_nvdec_new, @@ -2197,7 +2197,7 @@ nv132_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, - .disp = gp102_disp_new, + .disp = { 0x00000001, gp102_disp_new }, .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp102_gr_new, @@ -2232,7 +2232,7 @@ nv134_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, - .disp = gp102_disp_new, + .disp = { 0x00000001, gp102_disp_new }, .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp104_gr_new, @@ -2267,7 +2267,7 @@ nv136_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, - .disp = gp102_disp_new, + .disp = { 0x00000001, gp102_disp_new }, .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp104_gr_new, @@ -2301,7 +2301,7 @@ nv137_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, - .disp = gp102_disp_new, + .disp = { 0x00000001, gp102_disp_new }, .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp107_gr_new, @@ -2336,7 +2336,7 @@ nv138_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000000f, gp102_ce_new }, - .disp = gp102_disp_new, + .disp = { 0x00000001, gp102_disp_new }, .dma = gf119_dma_new, .fifo = gp100_fifo_new, .gr = gp108_gr_new, @@ -2394,7 +2394,7 @@ nv140_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x000001ff, gv100_ce_new }, - .disp = gv100_disp_new, + .disp = { 0x00000001, gv100_disp_new }, .dma = gv100_dma_new, .fifo = gv100_fifo_new, .gr = gv100_gr_new, @@ -2430,7 +2430,7 @@ nv162_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000001f, tu102_ce_new }, - .disp = tu102_disp_new, + .disp = { 0x00000001, tu102_disp_new }, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, @@ -2464,7 +2464,7 @@ nv164_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000001f, tu102_ce_new }, - .disp = tu102_disp_new, + .disp = { 0x00000001, tu102_disp_new }, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, @@ -2499,7 +2499,7 @@ nv166_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000001f, tu102_ce_new }, - .disp = tu102_disp_new, + .disp = { 0x00000001, tu102_disp_new }, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, @@ -2535,7 +2535,7 @@ nv167_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000001f, tu102_ce_new }, - .disp = tu102_disp_new, + .disp = { 0x00000001, tu102_disp_new }, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, @@ -2569,7 +2569,7 @@ nv168_chipset = { .timer = { 0x00000001, gk20a_timer_new }, .top = { 0x00000001, gk104_top_new }, .ce = { 0x0000001f, tu102_ce_new }, - .disp = tu102_disp_new, + .disp = { 0x00000001, tu102_disp_new }, .dma = gv100_dma_new, .fifo = tu102_fifo_new, .gr = tu102_gr_new, @@ -2610,7 +2610,7 @@ nv172_chipset = { .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .timer = { 0x00000001, gk20a_timer_new }, - .disp = ga102_disp_new, + .disp = { 0x00000001, ga102_disp_new }, .dma = gv100_dma_new, }; @@ -2629,7 +2629,7 @@ nv174_chipset = { .mmu = { 0x00000001, tu102_mmu_new }, .pci = { 0x00000001, gp100_pci_new }, .timer = { 0x00000001, gk20a_timer_new }, - .disp = ga102_disp_new, + .disp = { 0x00000001, ga102_disp_new }, .dma = gv100_dma_new, }; @@ -3174,7 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func, #include <core/layout.h> #undef NVKM_LAYOUT_INST #undef NVKM_LAYOUT_ONCE - _(NVKM_ENGINE_DISP , disp); _(NVKM_ENGINE_DMAOBJ , dma); _(NVKM_ENGINE_FIFO , fifo); _(NVKM_ENGINE_GR , gr); |