diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c index 79e5fd018a11..1b5053f9b120 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -56,10 +56,10 @@ MODULE_FIRMWARE("amdgpu/carrizo_sdma1.bin"); MODULE_FIRMWARE("amdgpu/fiji_sdma.bin"); MODULE_FIRMWARE("amdgpu/fiji_sdma1.bin"); MODULE_FIRMWARE("amdgpu/stoney_sdma.bin"); -MODULE_FIRMWARE("amdgpu/ellesmere_sdma.bin"); -MODULE_FIRMWARE("amdgpu/ellesmere_sdma1.bin"); -MODULE_FIRMWARE("amdgpu/baffin_sdma.bin"); -MODULE_FIRMWARE("amdgpu/baffin_sdma1.bin"); +MODULE_FIRMWARE("amdgpu/polaris10_sdma.bin"); +MODULE_FIRMWARE("amdgpu/polaris10_sdma1.bin"); +MODULE_FIRMWARE("amdgpu/polaris11_sdma.bin"); +MODULE_FIRMWARE("amdgpu/polaris11_sdma1.bin"); static const u32 sdma_offsets[SDMA_MAX_INSTANCE] = @@ -106,7 +106,7 @@ static const u32 fiji_mgcg_cgcg_init[] = mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100 }; -static const u32 golden_settings_baffin_a11[] = +static const u32 golden_settings_polaris11_a11[] = { mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007, mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100, @@ -118,7 +118,7 @@ static const u32 golden_settings_baffin_a11[] = mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100, }; -static const u32 golden_settings_ellesmere_a11[] = +static const u32 golden_settings_polaris10_a11[] = { mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007, mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000, @@ -203,15 +203,15 @@ static void sdma_v3_0_init_golden_registers(struct amdgpu_device *adev) golden_settings_tonga_a11, (const u32)ARRAY_SIZE(golden_settings_tonga_a11)); break; - case CHIP_BAFFIN: + case CHIP_POLARIS11: amdgpu_program_register_sequence(adev, - golden_settings_baffin_a11, - (const u32)ARRAY_SIZE(golden_settings_baffin_a11)); + golden_settings_polaris11_a11, + (const u32)ARRAY_SIZE(golden_settings_polaris11_a11)); break; - case CHIP_ELLESMERE: + case CHIP_POLARIS10: amdgpu_program_register_sequence(adev, - golden_settings_ellesmere_a11, - (const u32)ARRAY_SIZE(golden_settings_ellesmere_a11)); + golden_settings_polaris10_a11, + (const u32)ARRAY_SIZE(golden_settings_polaris10_a11)); break; case CHIP_CARRIZO: amdgpu_program_register_sequence(adev, @@ -261,11 +261,11 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev) case CHIP_FIJI: chip_name = "fiji"; break; - case CHIP_BAFFIN: - chip_name = "baffin"; + case CHIP_POLARIS11: + chip_name = "polaris11"; break; - case CHIP_ELLESMERE: - chip_name = "ellesmere"; + case CHIP_POLARIS10: + chip_name = "polaris10"; break; case CHIP_CARRIZO: chip_name = "carrizo"; |