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-rw-r--r--arch/mips/include/asm/hazards.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index 134e1fc8f4d6..a12d971db4f9 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -87,7 +87,7 @@ do { \
: "=r" (tmp)); \
} while (0)
-#elif defined(CONFIG_CPU_MIPSR1)
+#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MACH_ALCHEMY)
/*
* These are slightly complicated by the fact that we guarantee R1 kernels to
@@ -139,7 +139,7 @@ do { \
} while (0)
#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
- defined(CONFIG_CPU_R5500)
+ defined(CONFIG_CPU_R5500) || defined(CONFIG_MACH_ALCHEMY)
/*
* R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.