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-rw-r--r--arch/avr32/mach-at32ap/include/mach/at32ap700x.h245
-rw-r--r--arch/avr32/mach-at32ap/include/mach/board.h115
-rw-r--r--arch/avr32/mach-at32ap/include/mach/chip.h19
-rw-r--r--arch/avr32/mach-at32ap/include/mach/cpu.h23
-rw-r--r--arch/avr32/mach-at32ap/include/mach/gpio.h45
-rw-r--r--arch/avr32/mach-at32ap/include/mach/hmatrix.h55
-rw-r--r--arch/avr32/mach-at32ap/include/mach/init.h18
-rw-r--r--arch/avr32/mach-at32ap/include/mach/io.h38
-rw-r--r--arch/avr32/mach-at32ap/include/mach/irq.h14
-rw-r--r--arch/avr32/mach-at32ap/include/mach/pm.h27
-rw-r--r--arch/avr32/mach-at32ap/include/mach/portmux.h30
-rw-r--r--arch/avr32/mach-at32ap/include/mach/smc.h113
-rw-r--r--arch/avr32/mach-at32ap/include/mach/sram.h30
13 files changed, 0 insertions, 772 deletions
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
deleted file mode 100644
index b9222bf895bc..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ /dev/null
@@ -1,245 +0,0 @@
-/*
- * Pin definitions for AT32AP7000.
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_AT32AP700X_H__
-#define __ASM_ARCH_AT32AP700X_H__
-
-#define GPIO_PERIPH_A 0
-#define GPIO_PERIPH_B 1
-
-/*
- * Pin numbers identifying specific GPIO pins on the chip. They can
- * also be converted to IRQ numbers by passing them through
- * gpio_to_irq().
- */
-#define GPIO_PIOA_BASE (0)
-#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
-#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
-#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
-#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
-
-#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
-#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
-#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
-#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
-#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
-
-
-/*
- * DMAC peripheral hardware handshaking interfaces, used with dw_dmac
- */
-#define DMAC_MCI_RX 0
-#define DMAC_MCI_TX 1
-#define DMAC_DAC_TX 2
-#define DMAC_AC97_A_RX 3
-#define DMAC_AC97_A_TX 4
-#define DMAC_AC97_B_RX 5
-#define DMAC_AC97_B_TX 6
-#define DMAC_DMAREQ_0 7
-#define DMAC_DMAREQ_1 8
-#define DMAC_DMAREQ_2 9
-#define DMAC_DMAREQ_3 10
-
-/* HSB master IDs */
-#define HMATRIX_MASTER_CPU_DCACHE 0
-#define HMATRIX_MASTER_CPU_ICACHE 1
-#define HMATRIX_MASTER_PDC 2
-#define HMATRIX_MASTER_ISI 3
-#define HMATRIX_MASTER_USBA 4
-#define HMATRIX_MASTER_LCDC 5
-#define HMATRIX_MASTER_MACB0 6
-#define HMATRIX_MASTER_MACB1 7
-#define HMATRIX_MASTER_DMACA_M0 8
-#define HMATRIX_MASTER_DMACA_M1 9
-
-/* HSB slave IDs */
-#define HMATRIX_SLAVE_SRAM0 0
-#define HMATRIX_SLAVE_SRAM1 1
-#define HMATRIX_SLAVE_PBA 2
-#define HMATRIX_SLAVE_PBB 3
-#define HMATRIX_SLAVE_EBI 4
-#define HMATRIX_SLAVE_USBA 5
-#define HMATRIX_SLAVE_LCDC 6
-#define HMATRIX_SLAVE_DMACA 7
-
-/* Bits in HMATRIX SFR4 (EBI) */
-#define HMATRIX_EBI_SDRAM_ENABLE (1 << 1)
-#define HMATRIX_EBI_NAND_ENABLE (1 << 3)
-#define HMATRIX_EBI_CF0_ENABLE (1 << 4)
-#define HMATRIX_EBI_CF1_ENABLE (1 << 5)
-#define HMATRIX_EBI_PULLUP_DISABLE (1 << 8)
-
-/*
- * Base addresses of controllers that may be accessed early by
- * platform code.
- */
-#define PM_BASE 0xfff00000
-#define HMATRIX_BASE 0xfff00800
-#define SDRAMC_BASE 0xfff03800
-
-/* LCDC on port C */
-#define ATMEL_LCDC_PC_CC (1ULL << 19)
-#define ATMEL_LCDC_PC_HSYNC (1ULL << 20)
-#define ATMEL_LCDC_PC_PCLK (1ULL << 21)
-#define ATMEL_LCDC_PC_VSYNC (1ULL << 22)
-#define ATMEL_LCDC_PC_DVAL (1ULL << 23)
-#define ATMEL_LCDC_PC_MODE (1ULL << 24)
-#define ATMEL_LCDC_PC_PWR (1ULL << 25)
-#define ATMEL_LCDC_PC_DATA0 (1ULL << 26)
-#define ATMEL_LCDC_PC_DATA1 (1ULL << 27)
-#define ATMEL_LCDC_PC_DATA2 (1ULL << 28)
-#define ATMEL_LCDC_PC_DATA3 (1ULL << 29)
-#define ATMEL_LCDC_PC_DATA4 (1ULL << 30)
-#define ATMEL_LCDC_PC_DATA5 (1ULL << 31)
-
-/* LCDC on port D */
-#define ATMEL_LCDC_PD_DATA6 (1ULL << 0)
-#define ATMEL_LCDC_PD_DATA7 (1ULL << 1)
-#define ATMEL_LCDC_PD_DATA8 (1ULL << 2)
-#define ATMEL_LCDC_PD_DATA9 (1ULL << 3)
-#define ATMEL_LCDC_PD_DATA10 (1ULL << 4)
-#define ATMEL_LCDC_PD_DATA11 (1ULL << 5)
-#define ATMEL_LCDC_PD_DATA12 (1ULL << 6)
-#define ATMEL_LCDC_PD_DATA13 (1ULL << 7)
-#define ATMEL_LCDC_PD_DATA14 (1ULL << 8)
-#define ATMEL_LCDC_PD_DATA15 (1ULL << 9)
-#define ATMEL_LCDC_PD_DATA16 (1ULL << 10)
-#define ATMEL_LCDC_PD_DATA17 (1ULL << 11)
-#define ATMEL_LCDC_PD_DATA18 (1ULL << 12)
-#define ATMEL_LCDC_PD_DATA19 (1ULL << 13)
-#define ATMEL_LCDC_PD_DATA20 (1ULL << 14)
-#define ATMEL_LCDC_PD_DATA21 (1ULL << 15)
-#define ATMEL_LCDC_PD_DATA22 (1ULL << 16)
-#define ATMEL_LCDC_PD_DATA23 (1ULL << 17)
-
-/* LCDC on port E */
-#define ATMEL_LCDC_PE_CC (1ULL << (32 + 0))
-#define ATMEL_LCDC_PE_DVAL (1ULL << (32 + 1))
-#define ATMEL_LCDC_PE_MODE (1ULL << (32 + 2))
-#define ATMEL_LCDC_PE_DATA0 (1ULL << (32 + 3))
-#define ATMEL_LCDC_PE_DATA1 (1ULL << (32 + 4))
-#define ATMEL_LCDC_PE_DATA2 (1ULL << (32 + 5))
-#define ATMEL_LCDC_PE_DATA3 (1ULL << (32 + 6))
-#define ATMEL_LCDC_PE_DATA4 (1ULL << (32 + 7))
-#define ATMEL_LCDC_PE_DATA8 (1ULL << (32 + 8))
-#define ATMEL_LCDC_PE_DATA9 (1ULL << (32 + 9))
-#define ATMEL_LCDC_PE_DATA10 (1ULL << (32 + 10))
-#define ATMEL_LCDC_PE_DATA11 (1ULL << (32 + 11))
-#define ATMEL_LCDC_PE_DATA12 (1ULL << (32 + 12))
-#define ATMEL_LCDC_PE_DATA16 (1ULL << (32 + 13))
-#define ATMEL_LCDC_PE_DATA17 (1ULL << (32 + 14))
-#define ATMEL_LCDC_PE_DATA18 (1ULL << (32 + 15))
-#define ATMEL_LCDC_PE_DATA19 (1ULL << (32 + 16))
-#define ATMEL_LCDC_PE_DATA20 (1ULL << (32 + 17))
-#define ATMEL_LCDC_PE_DATA21 (1ULL << (32 + 18))
-
-
-#define ATMEL_LCDC(PORT, PIN) (ATMEL_LCDC_##PORT##_##PIN)
-
-
-#define ATMEL_LCDC_PRI_24B_DATA ( \
- ATMEL_LCDC(PC, DATA0) | ATMEL_LCDC(PC, DATA1) | \
- ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
- ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
- ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
- ATMEL_LCDC(PD, DATA8) | ATMEL_LCDC(PD, DATA9) | \
- ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
- ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \
- ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
- ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) | \
- ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \
- ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \
- ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
-
-#define ATMEL_LCDC_ALT_24B_DATA ( \
- ATMEL_LCDC(PE, DATA0) | ATMEL_LCDC(PE, DATA1) | \
- ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
- ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
- ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
- ATMEL_LCDC(PE, DATA8) | ATMEL_LCDC(PE, DATA9) | \
- ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
- ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \
- ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
- ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) | \
- ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \
- ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \
- ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
-
-#define ATMEL_LCDC_PRI_18B_DATA ( \
- ATMEL_LCDC(PC, DATA2) | ATMEL_LCDC(PC, DATA3) | \
- ATMEL_LCDC(PC, DATA4) | ATMEL_LCDC(PC, DATA5) | \
- ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
- ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) | \
- ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) | \
- ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
- ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) | \
- ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) | \
- ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
-
-#define ATMEL_LCDC_ALT_18B_DATA ( \
- ATMEL_LCDC(PE, DATA2) | ATMEL_LCDC(PE, DATA3) | \
- ATMEL_LCDC(PE, DATA4) | ATMEL_LCDC(PC, DATA5) | \
- ATMEL_LCDC(PD, DATA6) | ATMEL_LCDC(PD, DATA7) | \
- ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) | \
- ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) | \
- ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) | \
- ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) | \
- ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) | \
- ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
-
-#define ATMEL_LCDC_PRI_15B_DATA ( \
- ATMEL_LCDC(PC, DATA3) | ATMEL_LCDC(PC, DATA4) | \
- ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \
- ATMEL_LCDC(PD, DATA7) | \
- ATMEL_LCDC(PD, DATA11) | ATMEL_LCDC(PD, DATA12) | \
- ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \
- ATMEL_LCDC(PD, DATA15) | \
- ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20) | \
- ATMEL_LCDC(PD, DATA21) | ATMEL_LCDC(PD, DATA22) | \
- ATMEL_LCDC(PD, DATA23))
-
-#define ATMEL_LCDC_ALT_15B_DATA ( \
- ATMEL_LCDC(PE, DATA3) | ATMEL_LCDC(PE, DATA4) | \
- ATMEL_LCDC(PC, DATA5) | ATMEL_LCDC(PD, DATA6) | \
- ATMEL_LCDC(PD, DATA7) | \
- ATMEL_LCDC(PE, DATA11) | ATMEL_LCDC(PE, DATA12) | \
- ATMEL_LCDC(PD, DATA13) | ATMEL_LCDC(PD, DATA14) | \
- ATMEL_LCDC(PD, DATA15) | \
- ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20) | \
- ATMEL_LCDC(PE, DATA21) | ATMEL_LCDC(PD, DATA22) | \
- ATMEL_LCDC(PD, DATA23))
-
-#define ATMEL_LCDC_PRI_CONTROL ( \
- ATMEL_LCDC(PC, CC) | ATMEL_LCDC(PC, DVAL) | \
- ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR))
-
-#define ATMEL_LCDC_ALT_CONTROL ( \
- ATMEL_LCDC(PE, CC) | ATMEL_LCDC(PE, DVAL) | \
- ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR))
-
-#define ATMEL_LCDC_CONTROL ( \
- ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \
- ATMEL_LCDC(PC, PCLK))
-
-#define ATMEL_LCDC_PRI_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA)
-
-#define ATMEL_LCDC_ALT_24BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA)
-
-#define ATMEL_LCDC_PRI_18BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_18B_DATA)
-
-#define ATMEL_LCDC_ALT_18BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_18B_DATA)
-
-#define ATMEL_LCDC_PRI_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA)
-
-#define ATMEL_LCDC_ALT_15BIT (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
-
-/* Bitmask for all EBI data (D16..D31) pins on port E */
-#define ATMEL_EBI_PE_DATA_ALL (0x0000FFFF)
-
-#endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
deleted file mode 100644
index f1a316d52c73..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Platform data definitions.
- */
-#ifndef __ASM_ARCH_BOARD_H
-#define __ASM_ARCH_BOARD_H
-
-#include <linux/types.h>
-#include <linux/serial.h>
-#include <linux/platform_data/macb.h>
-#include <linux/platform_data/atmel.h>
-
-#define GPIO_PIN_NONE (-1)
-
-/*
- * Clock rates for various on-board oscillators. The number of entries
- * in this array is chip-dependent.
- */
-extern unsigned long at32_board_osc_rates[];
-
-/*
- * This used to add essential system devices, but this is now done
- * automatically. Please don't use it in new board code.
- */
-static inline void __deprecated at32_add_system_devices(void)
-{
-
-}
-
-extern struct platform_device *atmel_default_console_device;
-
-/* Flags for selecting USART extra pins */
-#define ATMEL_USART_RTS 0x01
-#define ATMEL_USART_CTS 0x02
-#define ATMEL_USART_CLK 0x04
-
-void at32_map_usart(unsigned int hw_id, unsigned int line, int flags);
-struct platform_device *at32_add_device_usart(unsigned int id);
-
-struct platform_device *
-at32_add_device_eth(unsigned int id, struct macb_platform_data *data);
-
-struct spi_board_info;
-struct platform_device *
-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
-void at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, unsigned int n);
-
-struct atmel_lcdfb_pdata;
-struct platform_device *
-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_pdata *data,
- unsigned long fbmem_start, unsigned long fbmem_len,
- u64 pin_mask);
-
-struct usba_platform_data;
-struct platform_device *
-at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
-
-struct ide_platform_data {
- u8 cs;
-};
-struct platform_device *
-at32_add_device_ide(unsigned int id, unsigned int extint,
- struct ide_platform_data *data);
-
-/* mask says which PWM channels to mux */
-struct platform_device *at32_add_device_pwm(u32 mask);
-
-/* depending on what's hooked up, not all SSC pins will be used */
-#define ATMEL_SSC_TK 0x01
-#define ATMEL_SSC_TF 0x02
-#define ATMEL_SSC_TD 0x04
-#define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)
-
-#define ATMEL_SSC_RK 0x10
-#define ATMEL_SSC_RF 0x20
-#define ATMEL_SSC_RD 0x40
-#define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)
-
-struct platform_device *
-at32_add_device_ssc(unsigned int id, unsigned int flags);
-
-struct i2c_board_info;
-struct platform_device *at32_add_device_twi(unsigned int id,
- struct i2c_board_info *b,
- unsigned int n);
-
-struct mci_platform_data;
-struct platform_device *
-at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
-
-struct ac97c_platform_data;
-struct platform_device *
-at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
- unsigned int flags);
-
-struct atmel_abdac_pdata;
-struct platform_device *
-at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data);
-
-struct platform_device *at32_add_device_psif(unsigned int id);
-
-struct cf_platform_data {
- int detect_pin;
- int reset_pin;
- int vcc_pin;
- int ready_pin;
- u8 cs;
-};
-struct platform_device *
-at32_add_device_cf(unsigned int id, unsigned int extint,
- struct cf_platform_data *data);
-
-struct platform_device *
-at32_add_device_nand(unsigned int id, struct atmel_nand_data *data);
-
-#endif /* __ASM_ARCH_BOARD_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/chip.h b/arch/avr32/mach-at32ap/include/mach/chip.h
deleted file mode 100644
index 5efca6da6acb..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/chip.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * AVR32 chip-specific definitions
- *
- * Copyright (C) 2008 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_ARCH_CHIP_H__
-#define __ASM_AVR32_ARCH_CHIP_H__
-
-#if defined(CONFIG_CPU_AT32AP700X)
-# include <mach/at32ap700x.h>
-#else
-# error Unknown chip type selected
-#endif
-
-#endif /* __ASM_AVR32_ARCH_CHIP_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/cpu.h b/arch/avr32/mach-at32ap/include/mach/cpu.h
deleted file mode 100644
index 4181086f4ddc..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/cpu.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * AVR32 CPU identification
- *
- * Copyright (C) 2007 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_CPU_H
-#define __ASM_ARCH_CPU_H
-
-/*
- * Only AT32AP7000 is defined for now. We can identify the specific
- * chip at runtime, but I'm not sure if it's really worth it.
- */
-#ifdef CONFIG_CPU_AT32AP700X
-# define cpu_is_at32ap7000() (1)
-#else
-# define cpu_is_at32ap7000() (0)
-#endif
-
-#endif /* __ASM_ARCH_CPU_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/gpio.h b/arch/avr32/mach-at32ap/include/mach/gpio.h
deleted file mode 100644
index 0180f584ef03..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/gpio.h
+++ /dev/null
@@ -1,45 +0,0 @@
-#ifndef __ASM_AVR32_ARCH_GPIO_H
-#define __ASM_AVR32_ARCH_GPIO_H
-
-#include <linux/compiler.h>
-#include <asm/irq.h>
-
-
-/* Some GPIO chips can manage IRQs; some can't. The exact numbers can
- * be changed if needed, but for the moment they're not configurable.
- */
-#define ARCH_NR_GPIOS (NR_GPIO_IRQS + 2 * 32)
-
-
-/* Arch-neutral GPIO API, supporting both "native" and external GPIOs. */
-#include <asm-generic/gpio.h>
-
-static inline int gpio_get_value(unsigned int gpio)
-{
- return __gpio_get_value(gpio);
-}
-
-static inline void gpio_set_value(unsigned int gpio, int value)
-{
- __gpio_set_value(gpio, value);
-}
-
-static inline int gpio_cansleep(unsigned int gpio)
-{
- return __gpio_cansleep(gpio);
-}
-
-
-static inline int gpio_to_irq(unsigned int gpio)
-{
- if (gpio < NR_GPIO_IRQS)
- return gpio + GPIO_IRQ_BASE;
- return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned int irq)
-{
- return irq - GPIO_IRQ_BASE;
-}
-
-#endif /* __ASM_AVR32_ARCH_GPIO_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/hmatrix.h b/arch/avr32/mach-at32ap/include/mach/hmatrix.h
deleted file mode 100644
index 7a368f227ebc..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/hmatrix.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * High-Speed Bus Matrix configuration registers
- *
- * Copyright (C) 2008 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __HMATRIX_H
-#define __HMATRIX_H
-
-extern struct clk at32_hmatrix_clk;
-
-void hmatrix_write_reg(unsigned long offset, u32 value);
-u32 hmatrix_read_reg(unsigned long offset);
-
-void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask);
-void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask);
-
-/* Master Configuration register */
-#define HMATRIX_MCFG(m) (0x0000 + 4 * (m))
-/* Undefined length burst limit */
-# define HMATRIX_MCFG_ULBT_INFINITE 0 /* Infinite length */
-# define HMATRIX_MCFG_ULBT_SINGLE 1 /* Single Access */
-# define HMATRIX_MCFG_ULBT_FOUR_BEAT 2 /* Four beat */
-# define HMATRIX_MCFG_ULBT_EIGHT_BEAT 3 /* Eight beat */
-# define HMATRIX_MCFG_ULBT_SIXTEEN_BEAT 4 /* Sixteen beat */
-
-/* Slave Configuration register */
-#define HMATRIX_SCFG(s) (0x0040 + 4 * (s))
-# define HMATRIX_SCFG_SLOT_CYCLE(x) ((x) << 0) /* Max burst cycles */
-# define HMATRIX_SCFG_DEFMSTR_NONE ( 0 << 16) /* No default master */
-# define HMATRIX_SCFG_DEFMSTR_LAST ( 1 << 16) /* Last def master */
-# define HMATRIX_SCFG_DEFMSTR_FIXED ( 2 << 16) /* Fixed def master */
-# define HMATRIX_SCFG_FIXED_DEFMSTR(m) ((m) << 18) /* Fixed master ID */
-# define HMATRIX_SCFG_ARBT_ROUND_ROBIN ( 0 << 24) /* RR arbitration */
-# define HMATRIX_SCFG_ARBT_FIXED_PRIO ( 1 << 24) /* Fixed priority */
-
-/* Slave Priority register A (master 0..7) */
-#define HMATRIX_PRAS(s) (0x0080 + 8 * (s))
-# define HMATRIX_PRAS_PRIO(m, p) ((p) << ((m) * 4))
-
-/* Slave Priority register A (master 8..15) */
-#define HMATRIX_PRBS(s) (0x0084 + 8 * (s))
-# define HMATRIX_PRBS_PRIO(m, p) ((p) << (((m) - 8) * 4))
-
-/* Master Remap Control Register */
-#define HMATRIX_MRCR 0x0100
-# define HMATRIX_MRCR_REMAP(m) ( 1 << (m)) /* Remap master m */
-
-/* Special Function Register. Bit definitions are chip-specific */
-#define HMATRIX_SFR(s) (0x0110 + 4 * (s))
-
-#endif /* __HMATRIX_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/init.h b/arch/avr32/mach-at32ap/include/mach/init.h
deleted file mode 100644
index bc40e3d46150..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/init.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * AT32AP platform initialization calls.
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_AT32AP_INIT_H__
-#define __ASM_AVR32_AT32AP_INIT_H__
-
-void setup_platform(void);
-void setup_board(void);
-
-void at32_setup_serial_console(unsigned int usart_id);
-
-#endif /* __ASM_AVR32_AT32AP_INIT_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/io.h b/arch/avr32/mach-at32ap/include/mach/io.h
deleted file mode 100644
index 22ea79b74052..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/io.h
+++ /dev/null
@@ -1,38 +0,0 @@
-#ifndef __ASM_AVR32_ARCH_AT32AP_IO_H
-#define __ASM_AVR32_ARCH_AT32AP_IO_H
-
-#include <linux/swab.h>
-
-#if defined(CONFIG_AP700X_32_BIT_SMC)
-# define __swizzle_addr_b(addr) (addr ^ 3UL)
-# define __swizzle_addr_w(addr) (addr ^ 2UL)
-# define __swizzle_addr_l(addr) (addr)
-# define ioswabb(a, x) (x)
-# define ioswabw(a, x) (x)
-# define ioswabl(a, x) (x)
-# define __mem_ioswabb(a, x) (x)
-# define __mem_ioswabw(a, x) swab16(x)
-# define __mem_ioswabl(a, x) swab32(x)
-#elif defined(CONFIG_AP700X_16_BIT_SMC)
-# define __swizzle_addr_b(addr) (addr ^ 1UL)
-# define __swizzle_addr_w(addr) (addr)
-# define __swizzle_addr_l(addr) (addr)
-# define ioswabb(a, x) (x)
-# define ioswabw(a, x) (x)
-# define ioswabl(a, x) swahw32(x)
-# define __mem_ioswabb(a, x) (x)
-# define __mem_ioswabw(a, x) swab16(x)
-# define __mem_ioswabl(a, x) swahb32(x)
-#else
-# define __swizzle_addr_b(addr) (addr)
-# define __swizzle_addr_w(addr) (addr)
-# define __swizzle_addr_l(addr) (addr)
-# define ioswabb(a, x) (x)
-# define ioswabw(a, x) swab16(x)
-# define ioswabl(a, x) swab32(x)
-# define __mem_ioswabb(a, x) (x)
-# define __mem_ioswabw(a, x) (x)
-# define __mem_ioswabl(a, x) (x)
-#endif
-
-#endif /* __ASM_AVR32_ARCH_AT32AP_IO_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/irq.h b/arch/avr32/mach-at32ap/include/mach/irq.h
deleted file mode 100644
index 608e350368c7..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/irq.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __ASM_AVR32_ARCH_IRQ_H
-#define __ASM_AVR32_ARCH_IRQ_H
-
-#define EIM_IRQ_BASE NR_INTERNAL_IRQS
-#define NR_EIM_IRQS 32
-#define AT32_EXTINT(n) (EIM_IRQ_BASE + (n))
-
-#define GPIO_IRQ_BASE (EIM_IRQ_BASE + NR_EIM_IRQS)
-#define NR_GPIO_CTLR (5 /*internal*/ + 1 /*external*/)
-#define NR_GPIO_IRQS (NR_GPIO_CTLR * 32)
-
-#define NR_IRQS (GPIO_IRQ_BASE + NR_GPIO_IRQS)
-
-#endif /* __ASM_AVR32_ARCH_IRQ_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/pm.h b/arch/avr32/mach-at32ap/include/mach/pm.h
deleted file mode 100644
index f29ff2cd23d3..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/pm.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * AVR32 AP Power Management.
- *
- * Copyright (C) 2008 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_ARCH_PM_H
-#define __ASM_AVR32_ARCH_PM_H
-
-/* Possible arguments to the "sleep" instruction */
-#define CPU_SLEEP_IDLE 0
-#define CPU_SLEEP_FROZEN 1
-#define CPU_SLEEP_STANDBY 2
-#define CPU_SLEEP_STOP 3
-#define CPU_SLEEP_STATIC 5
-
-#ifndef __ASSEMBLY__
-extern void cpu_enter_idle(void);
-extern void cpu_enter_standby(unsigned long sdramc_base);
-
-void intc_set_suspend_handler(unsigned long offset);
-#endif
-
-#endif /* __ASM_AVR32_ARCH_PM_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h
deleted file mode 100644
index 4873024e3b96..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/portmux.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * AT32 portmux interface.
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_PORTMUX_H__
-#define __ASM_ARCH_PORTMUX_H__
-
-/*
- * Set up pin multiplexing, called from board init only.
- *
- * The following flags determine the initial state of the pin.
- */
-#define AT32_GPIOF_PULLUP 0x00000001 /* (not-OUT) Enable pull-up */
-#define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */
-#define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */
-#define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */
-#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */
-
-void at32_select_periph(unsigned int port, unsigned int pin,
- unsigned int periph, unsigned long flags);
-void at32_select_gpio(unsigned int pin, unsigned long flags);
-void at32_deselect_pin(unsigned int pin);
-void at32_reserve_pin(unsigned int port, u32 pin_mask);
-
-#endif /* __ASM_ARCH_PORTMUX_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/smc.h b/arch/avr32/mach-at32ap/include/mach/smc.h
deleted file mode 100644
index c98eea44a70a..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/smc.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Static Memory Controller for AT32 chips
- *
- * Copyright (C) 2006 Atmel Corporation
- *
- * Inspired by the OMAP2 General-Purpose Memory Controller interface
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_AT32AP_SMC_H
-#define __ARCH_AT32AP_SMC_H
-
-/*
- * All timing parameters are in nanoseconds.
- */
-struct smc_timing {
- /* Delay from address valid to assertion of given strobe */
- int ncs_read_setup;
- int nrd_setup;
- int ncs_write_setup;
- int nwe_setup;
-
- /* Pulse length of given strobe */
- int ncs_read_pulse;
- int nrd_pulse;
- int ncs_write_pulse;
- int nwe_pulse;
-
- /* Total cycle length of given operation */
- int read_cycle;
- int write_cycle;
-
- /* Minimal recovery times, will extend cycle if needed */
- int ncs_read_recover;
- int nrd_recover;
- int ncs_write_recover;
- int nwe_recover;
-};
-
-/*
- * All timing parameters are in clock cycles.
- */
-struct smc_config {
-
- /* Delay from address valid to assertion of given strobe */
- u8 ncs_read_setup;
- u8 nrd_setup;
- u8 ncs_write_setup;
- u8 nwe_setup;
-
- /* Pulse length of given strobe */
- u8 ncs_read_pulse;
- u8 nrd_pulse;
- u8 ncs_write_pulse;
- u8 nwe_pulse;
-
- /* Total cycle length of given operation */
- u8 read_cycle;
- u8 write_cycle;
-
- /* Bus width in bytes */
- u8 bus_width;
-
- /*
- * 0: Data is sampled on rising edge of NCS
- * 1: Data is sampled on rising edge of NRD
- */
- unsigned int nrd_controlled:1;
-
- /*
- * 0: Data is driven on falling edge of NCS
- * 1: Data is driven on falling edge of NWR
- */
- unsigned int nwe_controlled:1;
-
- /*
- * 0: NWAIT is disabled
- * 1: Reserved
- * 2: NWAIT is frozen mode
- * 3: NWAIT in ready mode
- */
- unsigned int nwait_mode:2;
-
- /*
- * 0: Byte select access type
- * 1: Byte write access type
- */
- unsigned int byte_write:1;
-
- /*
- * Number of clock cycles before data is released after
- * the rising edge of the read controlling signal
- *
- * Total cycles from SMC is tdf_cycles + 1
- */
- unsigned int tdf_cycles:4;
-
- /*
- * 0: TDF optimization disabled
- * 1: TDF optimization enabled
- */
- unsigned int tdf_mode:1;
-};
-
-extern void smc_set_timing(struct smc_config *config,
- const struct smc_timing *timing);
-
-extern int smc_set_configuration(int cs, const struct smc_config *config);
-extern struct smc_config *smc_get_configuration(int cs);
-
-#endif /* __ARCH_AT32AP_SMC_H */
diff --git a/arch/avr32/mach-at32ap/include/mach/sram.h b/arch/avr32/mach-at32ap/include/mach/sram.h
deleted file mode 100644
index 4838dae7601a..000000000000
--- a/arch/avr32/mach-at32ap/include/mach/sram.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Simple SRAM allocator
- *
- * Copyright (C) 2008 Atmel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_AVR32_ARCH_SRAM_H
-#define __ASM_AVR32_ARCH_SRAM_H
-
-#include <linux/genalloc.h>
-
-extern struct gen_pool *sram_pool;
-
-static inline unsigned long sram_alloc(size_t len)
-{
- if (!sram_pool)
- return 0UL;
-
- return gen_pool_alloc(sram_pool, len);
-}
-
-static inline void sram_free(unsigned long addr, size_t len)
-{
- return gen_pool_free(sram_pool, addr, len);
-}
-
-#endif /* __ASM_AVR32_ARCH_SRAM_H */