diff options
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt2712e.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi index 2cd8b33886e5..f29ade61931d 100644 --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi @@ -703,30 +703,31 @@ }; u3phy0: usb-phy@11290000 { - compatible = "mediatek,mt2712-u3phy"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + compatible = "mediatek,mt2712-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x11290000 0x9000>; status = "okay"; - u2port0: usb-phy@11290000 { - reg = <0 0x11290000 0 0x700>; + u2port0: usb-phy@0 { + reg = <0x0 0x700>; clocks = <&clk26m>; clock-names = "ref"; #phy-cells = <1>; status = "okay"; }; - u2port1: usb-phy@11298000 { - reg = <0 0x11298000 0 0x700>; + u2port1: usb-phy@8000 { + reg = <0x8000 0x700>; clocks = <&clk26m>; clock-names = "ref"; #phy-cells = <1>; status = "okay"; }; - u3port0: usb-phy@11298700 { - reg = <0 0x11298700 0 0x900>; + u3port0: usb-phy@8700 { + reg = <0x8700 0x900>; clocks = <&clk26m>; clock-names = "ref"; #phy-cells = <1>; @@ -766,30 +767,31 @@ }; u3phy1: usb-phy@112e0000 { - compatible = "mediatek,mt2712-u3phy"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + compatible = "mediatek,mt2712-tphy", + "mediatek,generic-tphy-v2"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0x112e0000 0x9000>; status = "okay"; - u2port2: usb-phy@112e0000 { - reg = <0 0x112e0000 0 0x700>; + u2port2: usb-phy@0 { + reg = <0x0 0x700>; clocks = <&clk26m>; clock-names = "ref"; #phy-cells = <1>; status = "okay"; }; - u2port3: usb-phy@112e8000 { - reg = <0 0x112e8000 0 0x700>; + u2port3: usb-phy@8000 { + reg = <0x8000 0x700>; clocks = <&clk26m>; clock-names = "ref"; #phy-cells = <1>; status = "okay"; }; - u3port1: usb-phy@112e8700 { - reg = <0 0x112e8700 0 0x900>; + u3port1: usb-phy@8700 { + reg = <0x8700 0x900>; clocks = <&clk26m>; clock-names = "ref"; #phy-cells = <1>; |