diff options
Diffstat (limited to 'arch/arm/mach-orion5x/irq.c')
| -rw-r--r-- | arch/arm/mach-orion5x/irq.c | 27 |
1 files changed, 6 insertions, 21 deletions
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index d7512b925a85..43cf8bc9767b 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -28,29 +28,14 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) void __init orion5x_init_irq(void) { - int i; - orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK); /* - * Mask and clear GPIO IRQ interrupts - */ - writel(0x0, GPIO_LEVEL_MASK(0)); - writel(0x0, GPIO_EDGE_MASK(0)); - writel(0x0, GPIO_EDGE_CAUSE(0)); - - /* - * Register chained level handlers for GPIO IRQs by default. - * User can use set_type() if he wants to use edge types handlers. + * Initialize gpiolib for GPIOs 0-31. */ - for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { - set_irq_chip(i, &orion_gpio_irq_chip); - set_irq_handler(i, handle_level_irq); - irq_desc[i].status |= IRQ_LEVEL; - set_irq_flags(i, IRQF_VALID); - } - set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); - set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); + orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START); + irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); + irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); } |