diff options
Diffstat (limited to 'arch/arm/mach-exynos')
| -rw-r--r-- | arch/arm/mach-exynos/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/clock-exynos5.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/irqs.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/map.h | 4 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/regs-pmu.h | 3 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/mach-nuri.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/mach-universal_c210.c | 14 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/setup-usb-phy.c | 100 |
8 files changed, 108 insertions, 31 deletions
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index e81c35f936b5..a6a6a9417a01 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -232,6 +232,9 @@ config MACH_ARMLEX4210 config MACH_UNIVERSAL_C210 bool "Mobile UNIVERSAL_C210 Board" select CPU_EXYNOS4210 + select S5P_HRT + select CLKSRC_MMIO + select HAVE_SCHED_CLOCK select S5P_GPIO_INT select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 @@ -247,6 +250,7 @@ config MACH_UNIVERSAL_C210 select S3C_DEV_I2C1 select S3C_DEV_I2C3 select S3C_DEV_I2C5 + select S3C_DEV_USB_HSOTG select S5P_DEV_I2C_HDMIPHY select S5P_DEV_MFC select S5P_DEV_ONENAND @@ -259,6 +263,7 @@ config MACH_UNIVERSAL_C210 select EXYNOS4_SETUP_SDHCI select EXYNOS4_SETUP_FIMC select S5P_SETUP_MIPIPHY + select EXYNOS4_SETUP_USB_PHY help Machine support for Samsung Mobile Universal S5PC210 Reference Board. @@ -277,6 +282,7 @@ config MACH_NURI select S3C_DEV_I2C3 select S3C_DEV_I2C5 select S3C_DEV_I2C6 + select S3C_DEV_USB_HSOTG select S5P_DEV_CSIS0 select S5P_DEV_JPEG select S5P_DEV_FIMC0 diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index 5cd7a8b8868c..7ac6ff4c46bd 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = { .name = "dma", .devname = "dma-pl330.1", .enable = exynos5_clk_ip_fsys_ctrl, - .ctrlbit = (1 << 1), + .ctrlbit = (1 << 2), }; static struct clk exynos5_clk_mdma1 = { diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 591e78521a9f..c02dae7bf4a3 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -189,6 +189,7 @@ #define IRQ_IIC7 EXYNOS4_IRQ_IIC7 #define IRQ_USB_HOST EXYNOS4_IRQ_USB_HOST +#define IRQ_OTG EXYNOS4_IRQ_USB_HSOTG #define IRQ_HSMMC0 EXYNOS4_IRQ_HSMMC0 #define IRQ_HSMMC1 EXYNOS4_IRQ_HSMMC1 diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 6e6d11ff352a..e009a66477f4 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -130,6 +130,9 @@ #define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) #define EXYNOS4_PA_DWMCI 0x12550000 +#define EXYNOS4_PA_HSOTG 0x12480000 +#define EXYNOS4_PA_USB_HSPHY 0x125B0000 + #define EXYNOS4_PA_SATA 0x12560000 #define EXYNOS4_PA_SATAPHY 0x125D0000 #define EXYNOS4_PA_SATAPHY_CTRL 0x126B0000 @@ -186,6 +189,7 @@ #define S3C_PA_SPI0 EXYNOS4_PA_SPI0 #define S3C_PA_SPI1 EXYNOS4_PA_SPI1 #define S3C_PA_SPI2 EXYNOS4_PA_SPI2 +#define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG #define S5P_PA_EHCI EXYNOS4_PA_EHCI #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index 4c53f38b5a9e..d457d052a420 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -163,6 +163,9 @@ #define S5P_CHECK_SLEEP 0x00000BAD /* Only for EXYNOS4210 */ +#define S5P_USBDEVICE_PHY_CONTROL S5P_PMUREG(0x0704) +#define S5P_USBDEVICE_PHY_ENABLE (1 << 0) + #define S5P_USBHOST_PHY_CONTROL S5P_PMUREG(0x0708) #define S5P_USBHOST_PHY_ENABLE (1 << 0) diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c index 2c6d701116bf..a60269d0a119 100644 --- a/arch/arm/mach-exynos/mach-nuri.c +++ b/arch/arm/mach-exynos/mach-nuri.c @@ -352,6 +352,7 @@ static struct regulator_consumer_supply __initdata max8997_ldo1_[] = { REGULATOR_SUPPLY("vdd", "s5p-adc"), /* Used by CPU's ADC drv */ }; static struct regulator_consumer_supply __initdata max8997_ldo3_[] = { + REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */ REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */ }; static struct regulator_consumer_supply __initdata max8997_ldo4_[] = { @@ -367,7 +368,7 @@ static struct regulator_consumer_supply __initdata max8997_ldo7_[] = { REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */ }; static struct regulator_consumer_supply __initdata max8997_ldo8_[] = { - REGULATOR_SUPPLY("vusb_d", NULL), /* Used by CPU */ + REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* USB */ REGULATOR_SUPPLY("vdac", NULL), /* Used by CPU */ }; static struct regulator_consumer_supply __initdata max8997_ldo11_[] = { @@ -823,6 +824,7 @@ static struct regulator_init_data __initdata max8997_esafeout1_data = { .constraints = { .name = "SAFEOUT1", .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .always_on = 1, .state_mem = { .disabled = 1, }, @@ -1080,6 +1082,9 @@ static void __init nuri_ehci_init(void) s5p_ehci_set_platdata(pdata); } +/* USB OTG */ +static struct s3c_hsotg_plat nuri_hsotg_pdata; + /* CAMERA */ static struct regulator_consumer_supply cam_vt_cam15_supply = REGULATOR_SUPPLY("vdd_core", "6-003c"); @@ -1292,6 +1297,7 @@ static struct platform_device *nuri_devices[] __initdata = { &s5p_device_mfc_l, &s5p_device_mfc_r, &s5p_device_fimc_md, + &s3c_device_usb_hsotg, /* NURI Devices */ &nuri_gpio_keys, @@ -1340,6 +1346,7 @@ static void __init nuri_machine_init(void) nuri_camera_init(); nuri_ehci_init(); + s3c_hsotg_set_platdata(&nuri_hsotg_pdata); /* Last */ platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices)); diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c index bc8bf3b4fe43..9be8a07d7d01 100644 --- a/arch/arm/mach-exynos/mach-universal_c210.c +++ b/arch/arm/mach-exynos/mach-universal_c210.c @@ -41,6 +41,7 @@ #include <plat/pd.h> #include <plat/regs-fb-v4.h> #include <plat/fimc-core.h> +#include <plat/s5p-time.h> #include <plat/camport.h> #include <plat/mipi_csis.h> @@ -205,6 +206,7 @@ static struct regulator_init_data lp3974_ldo2_data = { }; static struct regulator_consumer_supply lp3974_ldo3_consumer[] = { + REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), @@ -290,6 +292,7 @@ static struct regulator_init_data lp3974_ldo7_data = { }; static struct regulator_consumer_supply lp3974_ldo8_consumer[] = { + REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), }; @@ -486,7 +489,10 @@ static struct regulator_init_data lp3974_vichg_data = { static struct regulator_init_data lp3974_esafeout1_data = { .constraints = { .name = "SAFEOUT1", + .min_uV = 4800000, + .max_uV = 4800000, .valid_ops_mask = REGULATOR_CHANGE_STATUS, + .always_on = 1, .state_mem = { .enabled = 1, }, @@ -994,6 +1000,9 @@ static struct gpio universal_camera_gpios[] = { { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" }, }; +/* USB OTG */ +static struct s3c_hsotg_plat universal_hsotg_pdata; + static void __init universal_camera_init(void) { s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), @@ -1049,6 +1058,7 @@ static struct platform_device *universal_devices[] __initdata = { &s5p_device_onenand, &s5p_device_fimd0, &s5p_device_jpeg, + &s3c_device_usb_hsotg, &s5p_device_mfc, &s5p_device_mfc_l, &s5p_device_mfc_r, @@ -1064,6 +1074,7 @@ static void __init universal_map_io(void) exynos_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); + s5p_set_timer_source(S5P_PWM2, S5P_PWM4); } static void s5p_tv_setup(void) @@ -1101,6 +1112,7 @@ static void __init universal_machine_init(void) i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, ARRAY_SIZE(i2c_gpio12_devs)); + s3c_hsotg_set_platdata(&universal_hsotg_pdata); universal_camera_init(); /* Last */ @@ -1114,7 +1126,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") .map_io = universal_map_io, .handle_irq = gic_handle_irq, .init_machine = universal_machine_init, - .timer = &exynos4_timer, + .timer = &s5p_timer, .reserve = &universal_reserve, .restart = exynos4_restart, MACHINE_END diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c index 41743d21e8c6..1af0a7f44e00 100644 --- a/arch/arm/mach-exynos/setup-usb-phy.c +++ b/arch/arm/mach-exynos/setup-usb-phy.c @@ -26,11 +26,71 @@ static int exynos4_usb_host_phy_is_on(void) return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1; } -static int exynos4_usb_phy1_init(struct platform_device *pdev) +static void exynos4210_usb_phy_clkset(struct platform_device *pdev) { - struct clk *otg_clk; struct clk *xusbxti_clk; u32 phyclk; + + /* set clock frequency for PLL */ + phyclk = readl(EXYNOS4_PHYCLK) & ~CLKSEL_MASK; + + xusbxti_clk = clk_get(&pdev->dev, "xusbxti"); + if (xusbxti_clk && !IS_ERR(xusbxti_clk)) { + switch (clk_get_rate(xusbxti_clk)) { + case 12 * MHZ: + phyclk |= CLKSEL_12M; + break; + case 24 * MHZ: + phyclk |= CLKSEL_24M; + break; + default: + case 48 * MHZ: + /* default reference clock */ + break; + } + clk_put(xusbxti_clk); + } + + writel(phyclk, EXYNOS4_PHYCLK); +} + +static int exynos4210_usb_phy0_init(struct platform_device *pdev) +{ + u32 rstcon; + + writel(readl(S5P_USBDEVICE_PHY_CONTROL) | S5P_USBDEVICE_PHY_ENABLE, + S5P_USBDEVICE_PHY_CONTROL); + + exynos4210_usb_phy_clkset(pdev); + + /* set to normal PHY0 */ + writel((readl(EXYNOS4_PHYPWR) & ~PHY0_NORMAL_MASK), EXYNOS4_PHYPWR); + + /* reset PHY0 and Link */ + rstcon = readl(EXYNOS4_RSTCON) | PHY0_SWRST_MASK; + writel(rstcon, EXYNOS4_RSTCON); + udelay(10); + + rstcon &= ~PHY0_SWRST_MASK; + writel(rstcon, EXYNOS4_RSTCON); + + return 0; +} + +static int exynos4210_usb_phy0_exit(struct platform_device *pdev) +{ + writel((readl(EXYNOS4_PHYPWR) | PHY0_ANALOG_POWERDOWN | + PHY0_OTG_DISABLE), EXYNOS4_PHYPWR); + + writel(readl(S5P_USBDEVICE_PHY_CONTROL) & ~S5P_USBDEVICE_PHY_ENABLE, + S5P_USBDEVICE_PHY_CONTROL); + + return 0; +} + +static int exynos4210_usb_phy1_init(struct platform_device *pdev) +{ + struct clk *otg_clk; u32 rstcon; int err; @@ -54,27 +114,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev) writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, S5P_USBHOST_PHY_CONTROL); - /* set clock frequency for PLL */ - phyclk = readl(EXYNOS4_PHYCLK) & ~CLKSEL_MASK; - - xusbxti_clk = clk_get(&pdev->dev, "xusbxti"); - if (xusbxti_clk && !IS_ERR(xusbxti_clk)) { - switch (clk_get_rate(xusbxti_clk)) { - case 12 * MHZ: - phyclk |= CLKSEL_12M; - break; - case 24 * MHZ: - phyclk |= CLKSEL_24M; - break; - default: - case 48 * MHZ: - /* default reference clock */ - break; - } - clk_put(xusbxti_clk); - } - - writel(phyclk, EXYNOS4_PHYCLK); + exynos4210_usb_phy_clkset(pdev); /* floating prevention logic: disable */ writel((readl(EXYNOS4_PHY1CON) | FPENABLEN), EXYNOS4_PHY1CON); @@ -102,7 +142,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev) return 0; } -static int exynos4_usb_phy1_exit(struct platform_device *pdev) +static int exynos4210_usb_phy1_exit(struct platform_device *pdev) { struct clk *otg_clk; int err; @@ -136,16 +176,20 @@ static int exynos4_usb_phy1_exit(struct platform_device *pdev) int s5p_usb_phy_init(struct platform_device *pdev, int type) { - if (type == S5P_USB_PHY_HOST) - return exynos4_usb_phy1_init(pdev); + if (type == S5P_USB_PHY_DEVICE) + return exynos4210_usb_phy0_init(pdev); + else if (type == S5P_USB_PHY_HOST) + return exynos4210_usb_phy1_init(pdev); return -EINVAL; } int s5p_usb_phy_exit(struct platform_device *pdev, int type) { - if (type == S5P_USB_PHY_HOST) - return exynos4_usb_phy1_exit(pdev); + if (type == S5P_USB_PHY_DEVICE) + return exynos4210_usb_phy0_exit(pdev); + else if (type == S5P_USB_PHY_HOST) + return exynos4210_usb_phy1_exit(pdev); return -EINVAL; } |