diff options
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8960.dtsi')
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8960.dtsi | 49 |
1 files changed, 46 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index a02b984cc68d..2096a94c9b52 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -4,6 +4,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8960.h> +#include <dt-bindings/mfd/qcom-rpm.h> #include <dt-bindings/soc/qcom,gsbi.h> / { @@ -73,11 +74,10 @@ cpu-offset = <0x80000>; }; - msmgpio: gpio@800000 { - compatible = "qcom,msm-gpio"; + msmgpio: pinctrl@800000 { + compatible = "qcom,msm8960-pinctrl"; gpio-controller; #gpio-cells = <2>; - ngpio = <150>; interrupts = <0 16 0x4>; interrupt-controller; #interrupt-cells = <2>; @@ -105,6 +105,24 @@ #reset-cells = <1>; }; + l2cc: clock-controller@2011000 { + compatible = "syscon"; + reg = <0x2011000 0x1000>; + }; + + rpm@108000 { + compatible = "qcom,rpm-msm8960"; + reg = <0x108000 0x1000>; + qcom,ipc = <&l2cc 0x8 2>; + + interrupts = <0 19 0>, <0 21 0>, <0 22 0>; + interrupt-names = "ack", "err", "wakeup"; + + regulators { + compatible = "qcom,rpm-pm8921-regulators"; + }; + }; + acc0: clock-controller@2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; @@ -253,5 +271,30 @@ compatible = "qcom,tcsr-msm8960", "syscon"; reg = <0x1a400000 0x100>; }; + + gsbi@16000000 { + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <1>; + reg = <0x16000000 0x100>; + clocks = <&gcc GSBI1_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + spi@16080000 { + compatible = "qcom,spi-qup-v1.1.1"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x16080000 0x1000>; + interrupts = <0 147 0>; + spi-max-frequency = <24000000>; + cs-gpios = <&msmgpio 8 0>; + + clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + }; }; }; |