diff options
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/cl0080.h | 52 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/fifo.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_abi16.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_chan.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drm.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvif/fifo.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/user.c | 38 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c | 38 |
9 files changed, 80 insertions, 104 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl0080.h b/drivers/gpu/drm/nouveau/include/nvif/cl0080.h index 57d4f457a7d4..0b86c44878e0 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/cl0080.h +++ b/drivers/gpu/drm/nouveau/include/nvif/cl0080.h @@ -60,37 +60,33 @@ struct nv_device_time_v0 { #define NV_DEVICE_INFO_UNIT (0xffffffffULL << 32) #define NV_DEVICE_INFO(n) ((n) | (0x00000000ULL << 32)) -#define NV_DEVICE_FIFO(n) ((n) | (0x00000001ULL << 32)) +#define NV_DEVICE_HOST(n) ((n) | (0x00000001ULL << 32)) -/* This will be returned for unsupported queries. */ +/* This will be returned in the mthd field for unsupported queries. */ #define NV_DEVICE_INFO_INVALID ~0ULL -/* These return a mask of available engines of particular type. */ -#define NV_DEVICE_INFO_ENGINE_SW NV_DEVICE_INFO(0x00000000) -#define NV_DEVICE_INFO_ENGINE_GR NV_DEVICE_INFO(0x00000001) -#define NV_DEVICE_INFO_ENGINE_MPEG NV_DEVICE_INFO(0x00000002) -#define NV_DEVICE_INFO_ENGINE_ME NV_DEVICE_INFO(0x00000003) -#define NV_DEVICE_INFO_ENGINE_CIPHER NV_DEVICE_INFO(0x00000004) -#define NV_DEVICE_INFO_ENGINE_BSP NV_DEVICE_INFO(0x00000005) -#define NV_DEVICE_INFO_ENGINE_VP NV_DEVICE_INFO(0x00000006) -#define NV_DEVICE_INFO_ENGINE_CE NV_DEVICE_INFO(0x00000007) -#define NV_DEVICE_INFO_ENGINE_SEC NV_DEVICE_INFO(0x00000008) -#define NV_DEVICE_INFO_ENGINE_MSVLD NV_DEVICE_INFO(0x00000009) -#define NV_DEVICE_INFO_ENGINE_MSPDEC NV_DEVICE_INFO(0x0000000a) -#define NV_DEVICE_INFO_ENGINE_MSPPP NV_DEVICE_INFO(0x0000000b) -#define NV_DEVICE_INFO_ENGINE_MSENC NV_DEVICE_INFO(0x0000000c) -#define NV_DEVICE_INFO_ENGINE_VIC NV_DEVICE_INFO(0x0000000d) -#define NV_DEVICE_INFO_ENGINE_SEC2 NV_DEVICE_INFO(0x0000000e) -#define NV_DEVICE_INFO_ENGINE_NVDEC NV_DEVICE_INFO(0x0000000f) -#define NV_DEVICE_INFO_ENGINE_NVENC NV_DEVICE_INFO(0x00000010) - +/* Returns the number of available runlists. */ +#define NV_DEVICE_HOST_RUNLISTS NV_DEVICE_HOST(0x00000000) /* Returns the number of available channels. */ -#define NV_DEVICE_FIFO_CHANNELS NV_DEVICE_FIFO(0x00000000) - -/* Returns a mask of available runlists. */ -#define NV_DEVICE_FIFO_RUNLISTS NV_DEVICE_FIFO(0x00000001) +#define NV_DEVICE_HOST_CHANNELS NV_DEVICE_HOST(0x00000001) -/* These return a mask of engines available on a particular runlist. */ -#define NV_DEVICE_FIFO_RUNLIST_ENGINES(n) ((n) + NV_DEVICE_FIFO(0x00000010)) -#define NV_DEVICE_FIFO_RUNLIST_ENGINES__SIZE 64 +/* Returns a mask of available engine types on runlist(data). */ +#define NV_DEVICE_HOST_RUNLIST_ENGINES NV_DEVICE_HOST(0x00000100) +#define NV_DEVICE_HOST_RUNLIST_ENGINES_SW 0x00000001 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_GR 0x00000002 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_MPEG 0x00000004 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_ME 0x00000008 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_CIPHER 0x00000010 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_BSP 0x00000020 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_VP 0x00000040 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_CE 0x00000080 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_SEC 0x00000100 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD 0x00000200 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC 0x00000400 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP 0x00000800 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_MSENC 0x00001000 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_VIC 0x00002000 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_SEC2 0x00004000 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVDEC 0x00008000 +#define NV_DEVICE_HOST_RUNLIST_ENGINES_NVENC 0x00010000 #endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/fifo.h b/drivers/gpu/drm/nouveau/include/nvif/fifo.h index e9468c9f9abf..d351ac890ca1 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/fifo.h +++ b/drivers/gpu/drm/nouveau/include/nvif/fifo.h @@ -2,15 +2,15 @@ #define __NVIF_FIFO_H__ #include <nvif/device.h> -/* Returns mask of runlists that support a NV_DEVICE_INFO_ENGINE_* type. */ +/* Returns mask of runlists that support a NV_DEVICE_INFO_RUNLIST_ENGINES_* type. */ u64 nvif_fifo_runlist(struct nvif_device *, u64 engine); /* CE-supporting runlists (excluding GRCE, if others exist). */ static inline u64 nvif_fifo_runlist_ce(struct nvif_device *device) { - u64 runmgr = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); - u64 runmce = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_CE); + u64 runmgr = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR); + u64 runmce = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_CE); if (runmce && !(runmce &= ~runmgr)) runmce = runmgr; return runmce; diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index f08b31d84d4d..0a9334deffe2 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -269,19 +269,19 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS) if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { if (init->fb_ctxdma_handle == ~0) { switch (init->tt_ctxdma_handle) { - case 0x01: engine = NV_DEVICE_INFO_ENGINE_GR ; break; - case 0x02: engine = NV_DEVICE_INFO_ENGINE_MSPDEC; break; - case 0x04: engine = NV_DEVICE_INFO_ENGINE_MSPPP ; break; - case 0x08: engine = NV_DEVICE_INFO_ENGINE_MSVLD ; break; - case 0x30: engine = NV_DEVICE_INFO_ENGINE_CE ; break; + case 0x01: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_GR ; break; + case 0x02: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC; break; + case 0x04: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP ; break; + case 0x08: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD ; break; + case 0x30: engine = NV_DEVICE_HOST_RUNLIST_ENGINES_CE ; break; default: return nouveau_abi16_put(abi16, -ENOSYS); } } else { - engine = NV_DEVICE_INFO_ENGINE_GR; + engine = NV_DEVICE_HOST_RUNLIST_ENGINES_GR; } - if (engine != NV_DEVICE_INFO_ENGINE_CE) + if (engine != NV_DEVICE_HOST_RUNLIST_ENGINES_CE) engine = nvif_fifo_runlist(device, engine); else engine = nvif_fifo_runlist_ce(device); diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index e48f1f7eb370..7cfac265fd45 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -556,7 +556,7 @@ nouveau_channels_init(struct nouveau_drm *drm) } args = { .m.version = 1, .m.count = sizeof(args.v) / sizeof(args.v.channels), - .v.channels.mthd = NV_DEVICE_FIFO_CHANNELS, + .v.channels.mthd = NV_DEVICE_HOST_CHANNELS, }; struct nvif_object *device = &drm->client.device.object; int ret; diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 1b2169e9c295..885815ea917f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -344,7 +344,7 @@ nouveau_accel_gr_init(struct nouveau_drm *drm) /* Allocate channel that has access to the graphics engine. */ if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { - arg0 = nvif_fifo_runlist(device, NV_DEVICE_INFO_ENGINE_GR); + arg0 = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR); arg1 = 1; } else { arg0 = NvDmaFB; diff --git a/drivers/gpu/drm/nouveau/nvif/fifo.c b/drivers/gpu/drm/nouveau/nvif/fifo.c index e84a2e2ff043..a463289962b2 100644 --- a/drivers/gpu/drm/nouveau/nvif/fifo.c +++ b/drivers/gpu/drm/nouveau/nvif/fifo.c @@ -41,9 +41,11 @@ nvif_fifo_runlists(struct nvif_device *device) return -ENOMEM; a->m.version = 1; a->m.count = sizeof(a->v) / sizeof(a->v.runlists); - a->v.runlists.mthd = NV_DEVICE_FIFO_RUNLISTS; - for (i = 0; i < ARRAY_SIZE(a->v.runlist); i++) - a->v.runlist[i].mthd = NV_DEVICE_FIFO_RUNLIST_ENGINES(i); + a->v.runlists.mthd = NV_DEVICE_HOST_RUNLISTS; + for (i = 0; i < ARRAY_SIZE(a->v.runlist); i++) { + a->v.runlist[i].mthd = NV_DEVICE_HOST_RUNLIST_ENGINES; + a->v.runlist[i].data = i; + } ret = nvif_object_mthd(object, NV_DEVICE_V0_INFO, a, sizeof(*a)); if (ret) @@ -58,7 +60,7 @@ nvif_fifo_runlists(struct nvif_device *device) } for (i = 0; i < device->runlists; i++) { - if (a->v.runlists.data & BIT_ULL(i)) + if (a->v.runlist[i].mthd != NV_DEVICE_INFO_INVALID) device->runlist[i].engines = a->v.runlist[i].data; } @@ -70,29 +72,15 @@ done: u64 nvif_fifo_runlist(struct nvif_device *device, u64 engine) { - struct nvif_object *object = &device->object; - struct { - struct nv_device_info_v1 m; - struct { - struct nv_device_info_v1_data engine; - } v; - } a = { - .m.version = 1, - .m.count = sizeof(a.v) / sizeof(a.v.engine), - .v.engine.mthd = engine, - }; u64 runm = 0; int ret, i; if ((ret = nvif_fifo_runlists(device))) return runm; - ret = nvif_object_mthd(object, NV_DEVICE_V0_INFO, &a, sizeof(a)); - if (ret == 0) { - for (i = 0; i < device->runlists; i++) { - if (device->runlist[i].engines & a.v.engine.data) - runm |= BIT_ULL(i); - } + for (i = 0; i < device->runlists; i++) { + if (device->runlist[i].engines & engine) + runm |= BIT_ULL(i); } return runm; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c index e1958070b895..fea9d8f2b10c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/user.c @@ -43,15 +43,15 @@ static int nvkm_udevice_info_subdev(struct nvkm_device *device, u64 mthd, u64 *data) { struct nvkm_subdev *subdev; - enum nvkm_devidx subidx; + enum nvkm_subdev_type type; switch (mthd & NV_DEVICE_INFO_UNIT) { - case NV_DEVICE_FIFO(0): subidx = NVKM_ENGINE_FIFO; break; + case NV_DEVICE_HOST(0): type = NVKM_ENGINE_FIFO; break; default: return -EINVAL; } - subdev = nvkm_device_subdev(device, subidx, 0); + subdev = nvkm_device_subdev(device, type, 0); if (subdev) return nvkm_subdev_info(subdev, mthd, data); return -ENODEV; @@ -66,37 +66,7 @@ nvkm_udevice_info_v1(struct nvkm_device *device, args->mthd = NV_DEVICE_INFO_INVALID; return; } - - switch (args->mthd) { -#define ENGINE__(A,B,C) NV_DEVICE_INFO_ENGINE_##A: { int _i; \ - for (_i = (B), args->data = 0ULL; _i <= (C); _i++) { \ - if (nvkm_device_engine(device, _i, 0)) \ - args->data |= BIT_ULL(_i); \ - } \ -} -#define ENGINE_A(A) ENGINE__(A, NVKM_ENGINE_##A , NVKM_ENGINE_##A) -#define ENGINE_B(A) ENGINE__(A, NVKM_ENGINE_##A##0, NVKM_ENGINE_##A##_LAST) - case ENGINE_A(SW ); break; - case ENGINE_A(GR ); break; - case ENGINE_A(MPEG ); break; - case ENGINE_A(ME ); break; - case ENGINE_A(CIPHER); break; - case ENGINE_A(BSP ); break; - case ENGINE_A(VP ); break; - case ENGINE_B(CE ); break; - case ENGINE_A(SEC ); break; - case ENGINE_A(MSVLD ); break; - case ENGINE_A(MSPDEC); break; - case ENGINE_A(MSPPP ); break; - case ENGINE_A(MSENC ); break; - case ENGINE_A(VIC ); break; - case ENGINE_A(SEC2 ); break; - case ENGINE_B(NVDEC ); break; - case ENGINE_B(NVENC ); break; - default: - args->mthd = NV_DEVICE_INFO_INVALID; - break; - } + args->mthd = NV_DEVICE_INFO_INVALID; } static int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c index d4061ef90ec8..2ed4ff05d207 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c @@ -292,7 +292,7 @@ nvkm_fifo_info(struct nvkm_engine *engine, u64 mthd, u64 *data) { struct nvkm_fifo *fifo = nvkm_fifo(engine); switch (mthd) { - case NV_DEVICE_FIFO_CHANNELS: *data = fifo->nr; return 0; + case NV_DEVICE_HOST_CHANNELS: *data = fifo->nr; return 0; default: if (fifo->func->info) return fifo->func->info(fifo, mthd, data); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c index 8266b9b4585f..69da601f1754 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c @@ -884,19 +884,41 @@ gk104_fifo_info(struct nvkm_fifo *base, u64 mthd, u64 *data) { struct gk104_fifo *fifo = gk104_fifo(base); switch (mthd) { - case NV_DEVICE_FIFO_RUNLISTS: + case NV_DEVICE_HOST_RUNLISTS: *data = (1ULL << fifo->runlist_nr) - 1; return 0; - case NV_DEVICE_FIFO_RUNLIST_ENGINES(0)... - NV_DEVICE_FIFO_RUNLIST_ENGINES(63): { - int runl = mthd - NV_DEVICE_FIFO_RUNLIST_ENGINES(0), engn; - if (runl < fifo->runlist_nr) { - unsigned long engm = fifo->runlist[runl].engm; + case NV_DEVICE_HOST_RUNLIST_ENGINES: { + if (*data < fifo->runlist_nr) { + unsigned long engm = fifo->runlist[*data].engm; struct nvkm_engine *engine; + int engn; *data = 0; for_each_set_bit(engn, &engm, fifo->engine_nr) { - if ((engine = fifo->engine[engn].engine)) - *data |= BIT_ULL(engine->subdev.index); + if ((engine = fifo->engine[engn].engine)) { +#define CASE(n) case NVKM_ENGINE_##n: *data |= NV_DEVICE_HOST_RUNLIST_ENGINES_##n; break + switch (engine->subdev.type) { + CASE(SW ); + CASE(GR ); + CASE(MPEG ); + CASE(ME ); + CASE(CIPHER); + CASE(BSP ); + CASE(VP ); + CASE(CE ); + CASE(SEC ); + CASE(MSVLD ); + CASE(MSPDEC); + CASE(MSPPP ); + CASE(MSENC ); + CASE(VIC ); + CASE(SEC2 ); + CASE(NVDEC ); + CASE(NVENC ); + default: + WARN_ON(1); + break; + } + } } return 0; } |