diff options
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c | 26 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c | 5 |
3 files changed, 32 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c index b754b65f2c36..29c692c661da 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.c @@ -43,7 +43,11 @@ nvkm_pmu_send(struct nvkm_pmu *pmu, u32 reply[2], /* wait for a free slot in the fifo */ addr = nvkm_rd32(device, 0x10a4a0); - if (!nv_wait_ne(pmu, 0x10a4b0, 0xffffffff, addr ^ 8)) + if (nvkm_msec(device, 2000, + u32 tmp = nvkm_rd32(device, 0x10a4b0); + if (tmp != (addr ^ 8)) + break; + ) < 0) return -EBUSY; /* we currently only support a single process at a time waiting @@ -203,11 +207,17 @@ _nvkm_pmu_init(struct nvkm_object *object) /* prevent previous ucode from running, wait for idle, reset */ nvkm_wr32(device, 0x10a014, 0x0000ffff); /* INTR_EN_CLR = ALL */ - nv_wait(pmu, 0x10a04c, 0xffffffff, 0x00000000); + nvkm_msec(device, 2000, + if (!nvkm_rd32(device, 0x10a04c)) + break; + ); nvkm_mask(device, 0x000200, 0x00002000, 0x00000000); nvkm_mask(device, 0x000200, 0x00002000, 0x00002000); nvkm_rd32(device, 0x000200); - nv_wait(pmu, 0x10a10c, 0x00000006, 0x00000000); + nvkm_msec(device, 2000, + if (!(nvkm_rd32(device, 0x10a10c) & 0x00000006)) + break; + ); /* upload data segment */ nvkm_wr32(device, 0x10a1c0, 0x01000000); @@ -228,13 +238,19 @@ _nvkm_pmu_init(struct nvkm_object *object) nvkm_wr32(device, 0x10a100, 0x00000002); /* wait for valid host->pmu ring configuration */ - if (!nv_wait_ne(pmu, 0x10a4d0, 0xffffffff, 0x00000000)) + if (nvkm_msec(device, 2000, + if (nvkm_rd32(device, 0x10a4d0)) + break; + ) < 0) return -EBUSY; pmu->send.base = nvkm_rd32(device, 0x10a4d0) & 0x0000ffff; pmu->send.size = nvkm_rd32(device, 0x10a4d0) >> 16; /* wait for valid pmu->host ring configuration */ - if (!nv_wait_ne(pmu, 0x10a4dc, 0xffffffff, 0x00000000)) + if (nvkm_msec(device, 2000, + if (nvkm_rd32(device, 0x10a4dc)) + break; + ) < 0) return -EBUSY; pmu->recv.base = nvkm_rd32(device, 0x10a4dc) & 0x0000ffff; pmu->recv.size = nvkm_rd32(device, 0x10a4dc) >> 16; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c index a6d6162a3618..469177e34563 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.c @@ -36,10 +36,13 @@ magic_(struct nvkm_device *device, u32 ctrl, int size) nvkm_wr32(device, 0x00c800, 0x00000000); nvkm_wr32(device, 0x00c808, 0x00000000); nvkm_wr32(device, 0x00c800, ctrl); - if (nv_wait(device, 0x00c800, 0x40000000, 0x40000000)) { - while (size--) - nvkm_wr32(device, 0x00c804, 0x00000000); - } + nvkm_msec(device, 2000, + if (nvkm_rd32(device, 0x00c800) & 0x40000000) { + while (size--) + nvkm_wr32(device, 0x00c804, 0x00000000); + break; + } + ); nvkm_wr32(device, 0x00c800, 0x00000000); } diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c index 37ab487d60aa..162c007d49c8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.c @@ -67,7 +67,10 @@ gk110_pmu_pgob(struct nvkm_pmu *pmu, bool enable) nvkm_mask(device, 0x0206b4, 0x00000000, 0x00000000); for (i = 0; i < ARRAY_SIZE(magic); i++) { nvkm_wr32(device, magic[i].addr, magic[i].data); - nv_wait(pmu, magic[i].addr, 0x80000000, 0x00000000); + nvkm_msec(device, 2000, + if (!(nvkm_rd32(device, magic[i].addr) & 0x80000000)) + break; + ); } nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000000); |