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-rw-r--r--drivers/gpu/drm/i915/intel_guc_loader.c14
-rw-r--r--drivers/gpu/drm/i915/intel_huc.c14
-rw-r--r--drivers/gpu/drm/i915/intel_uc.c18
-rw-r--r--drivers/gpu/drm/i915/intel_uc.h4
4 files changed, 21 insertions, 29 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index d731f68fab9c..f8c9e3126074 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -393,15 +393,12 @@ int intel_guc_init_hw(struct intel_guc *guc)
}
/**
- * intel_guc_init_fw() - select and prepare firmware for loading
+ * intel_guc_select_fw() - selects GuC firmware for loading
* @guc: intel_guc struct
*
- * Called early during driver load, but after GEM is initialised.
- *
- * The firmware will be transferred to the GuC's memory later,
- * when intel_guc_init_hw() is called.
+ * Return: zero when we know firmware, non-zero in other case
*/
-void intel_guc_init_fw(struct intel_guc *guc)
+int intel_guc_select_fw(struct intel_guc *guc)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
@@ -424,11 +421,10 @@ void intel_guc_init_fw(struct intel_guc *guc)
guc->fw.minor_ver_wanted = KBL_FW_MINOR;
} else {
DRM_ERROR("No GuC firmware known for platform with GuC!\n");
- i915.enable_guc_loading = 0;
- return;
+ return -ENOENT;
}
- intel_uc_prepare_fw(dev_priv, &guc->fw);
+ return 0;
}
/**
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 5fadd55790eb..ea67abc4748d 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -141,18 +141,10 @@ static int huc_ucode_xfer(struct drm_i915_private *dev_priv)
}
/**
- * intel_huc_init_fw() - select and prepare firmware for loading
+ * intel_huc_select_fw() - selects HuC firmware for loading
* @huc: intel_huc struct
- *
- * Called early during driver load, but after GEM is initialised. The loading
- * will continue only when driver explicitly specify firmware name and version.
- * All other cases are considered as INTEL_UC_FIRMWARE_NONE either because HW
- * is not capable or driver yet support it. And there will be no error message
- * for INTEL_UC_FIRMWARE_NONE cases.
- *
- * The DMA-copying to HW is done later when intel_huc_init_hw() is called.
*/
-void intel_huc_init_fw(struct intel_huc *huc)
+void intel_huc_select_fw(struct intel_huc *huc)
{
struct drm_i915_private *dev_priv = huc_to_i915(huc);
@@ -177,8 +169,6 @@ void intel_huc_init_fw(struct intel_huc *huc)
DRM_ERROR("No HuC firmware known for platform with HuC!\n");
return;
}
-
- intel_uc_prepare_fw(dev_priv, &huc->fw);
}
/**
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 4b85a0f7efd1..eaa2b758fc9a 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -66,6 +66,14 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
if (!i915.enable_guc_loading)
i915.enable_guc_submission = 0;
}
+
+ if (i915.enable_guc_loading) {
+ if (HAS_HUC_UCODE(dev_priv))
+ intel_huc_select_fw(&dev_priv->huc);
+
+ if (intel_guc_select_fw(&dev_priv->guc))
+ i915.enable_guc_loading = 0;
+ }
}
void intel_uc_init_early(struct drm_i915_private *dev_priv)
@@ -75,13 +83,11 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
void intel_uc_init_fw(struct drm_i915_private *dev_priv)
{
- if (!i915.enable_guc_loading)
- return;
-
- if (HAS_HUC_UCODE(dev_priv))
- intel_huc_init_fw(&dev_priv->huc);
+ if (dev_priv->huc.fw.path)
+ intel_uc_prepare_fw(dev_priv, &dev_priv->huc.fw);
- intel_guc_init_fw(&dev_priv->guc);
+ if (dev_priv->guc.fw.path)
+ intel_uc_prepare_fw(dev_priv, &dev_priv->guc.fw);
}
int intel_uc_init_hw(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 794e6eaaadde..170dd700bce7 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -194,7 +194,7 @@ int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len);
int intel_guc_sample_forcewake(struct intel_guc *guc);
/* intel_guc_loader.c */
-void intel_guc_init_fw(struct intel_guc *guc);
+int intel_guc_select_fw(struct intel_guc *guc);
int intel_guc_init_hw(struct intel_guc *guc);
void intel_guc_fini(struct drm_i915_private *dev_priv);
const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status);
@@ -226,7 +226,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
}
/* intel_huc.c */
-void intel_huc_init_fw(struct intel_huc *huc);
+void intel_huc_select_fw(struct intel_huc *huc);
void intel_huc_fini(struct drm_i915_private *dev_priv);
int intel_huc_init_hw(struct intel_huc *huc);
void intel_guc_auth_huc(struct drm_i915_private *dev_priv);