diff options
| -rw-r--r-- | arch/arm/include/asm/unistd.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/uapi/asm/unistd.h | 2 | ||||
| -rw-r--r-- | arch/arm/kernel/calls.S | 2 | ||||
| -rw-r--r-- | arch/arm/mm/proc-v7-3level.S | 7 |
4 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 21ca0cebcab0..32640c431a08 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h @@ -19,7 +19,7 @@ * This may need to be greater than __NR_last_syscall+1 in order to * account for the padding in the syscall table */ -#define __NR_syscalls (384) +#define __NR_syscalls (388) /* * *NOTE*: This is a ghost syscall private to the kernel. Only the diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h index 767ea204334e..3aaa75cae90c 100644 --- a/arch/arm/include/uapi/asm/unistd.h +++ b/arch/arm/include/uapi/asm/unistd.h @@ -410,6 +410,8 @@ #define __NR_sched_getattr (__NR_SYSCALL_BASE+381) #define __NR_renameat2 (__NR_SYSCALL_BASE+382) #define __NR_seccomp (__NR_SYSCALL_BASE+383) +#define __NR_getrandom (__NR_SYSCALL_BASE+384) +#define __NR_memfd_create (__NR_SYSCALL_BASE+385) /* * The following SWIs are ARM private. diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index bea85f97f363..9f899d8fdcca 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S @@ -393,6 +393,8 @@ CALL(sys_sched_getattr) CALL(sys_renameat2) CALL(sys_seccomp) + CALL(sys_getrandom) +/* 385 */ CALL(sys_memfd_create) #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S index e4c8acfc1323..1a24e9232ec8 100644 --- a/arch/arm/mm/proc-v7-3level.S +++ b/arch/arm/mm/proc-v7-3level.S @@ -146,12 +146,11 @@ ENDPROC(cpu_v7_set_pte_ext) mov \tmp, \ttbr1, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits mov \ttbr1, \ttbr1, lsl #ARCH_PGD_SHIFT @ lower bits addls \ttbr1, \ttbr1, #TTBR1_OFFSET - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 + adcls \tmp, \tmp, #0 + mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1 mov \tmp, \ttbr0, lsr #(32 - ARCH_PGD_SHIFT) @ upper bits mov \ttbr0, \ttbr0, lsl #ARCH_PGD_SHIFT @ lower bits - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 - mcrr p15, 1, \ttbr1, \zero, c2 @ load TTBR1 - mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 + mcrr p15, 0, \ttbr0, \tmp, c2 @ load TTBR0 .endm /* |