diff options
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml | 63 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml (renamed from Documentation/devicetree/bindings/clock/qcom,videocc.yaml) | 27 |
2 files changed, 77 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml new file mode 100644 index 000000000000..31df901884ac --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,sc7180-videocc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Video Clock & Reset Controller Binding for SC7180 + +maintainers: + - Taniya Das <tdas@codeaurora.org> + +description: | + Qualcomm video clock control module which supports the clocks, resets and + power domains on SC7180. + + See also dt-bindings/clock/qcom,videocc-sc7180.h. + +properties: + compatible: + const: qcom,sc7180-videocc + + clocks: + items: + - description: Board XO source + + clock-names: + items: + - const: bi_tcxo + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +examples: + - | + #include <dt-bindings/clock/qcom,rpmh.h> + clock-controller@ab00000 { + compatible = "qcom,sc7180-videocc"; + reg = <0 0x0ab00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml index 43cfc893a8d1..9d216c0f11d4 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml @@ -1,30 +1,31 @@ # SPDX-License-Identifier: GPL-2.0-only %YAML 1.2 --- -$id: http://devicetree.org/schemas/bindings/clock/qcom,videocc.yaml# +$id: http://devicetree.org/schemas/clock/qcom,sdm845-videocc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Qualcomm Video Clock & Reset Controller Binding +title: Qualcomm Video Clock & Reset Controller Binding for SDM845 maintainers: - Taniya Das <tdas@codeaurora.org> description: | Qualcomm video clock control module which supports the clocks, resets and - power domains. + power domains on SDM845. + + See also dt-bindings/clock/qcom,videocc-sdm845.h. properties: compatible: - enum: - - qcom,sc7180-videocc - - qcom,sdm845-videocc + const: qcom,sdm845-videocc clocks: - maxItems: 1 + items: + - description: Board XO source clock-names: items: - - const: xo + - const: bi_tcxo '#clock-cells': const: 1 @@ -48,15 +49,15 @@ required: - '#power-domain-cells' examples: - # Example of VIDEOCC with clock node properties for SDM845: - | + #include <dt-bindings/clock/qcom,rpmh.h> clock-controller@ab00000 { compatible = "qcom,sdm845-videocc"; - reg = <0xab00000 0x10000>; - clocks = <&rpmhcc 0>; - clock-names = "xo"; + reg = <0 0x0ab00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - }; + }; ... |