diff options
| -rw-r--r-- | arch/x86/kernel/i8259_32.c | 6 | ||||
| -rw-r--r-- | arch/x86/mach-default/setup.c | 6 | ||||
| -rw-r--r-- | arch/x86/mach-voyager/setup.c | 6 |
3 files changed, 15 insertions, 3 deletions
diff --git a/arch/x86/kernel/i8259_32.c b/arch/x86/kernel/i8259_32.c index 679bb33acbf1..d34a10cc13a7 100644 --- a/arch/x86/kernel/i8259_32.c +++ b/arch/x86/kernel/i8259_32.c @@ -349,7 +349,11 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id) * New motherboards sometimes make IRQ 13 be a PCI interrupt, * so allow interrupt sharing. */ -static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL }; +static struct irqaction fpu_irq = { + .handler = math_error_irq, + .mask = CPU_MASK_NONE, + .name = "fpu", +}; void __init init_ISA_irqs (void) { diff --git a/arch/x86/mach-default/setup.c b/arch/x86/mach-default/setup.c index 1bd82983986d..3f08010f3517 100644 --- a/arch/x86/mach-default/setup.c +++ b/arch/x86/mach-default/setup.c @@ -35,7 +35,11 @@ void __init pre_intr_init_hook(void) /* * IRQ2 is cascade interrupt to second interrupt controller */ -static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; +static struct irqaction irq2 = { + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "cascade", +}; /** * intr_init_hook - post gate setup interrupt initialisation diff --git a/arch/x86/mach-voyager/setup.c b/arch/x86/mach-voyager/setup.c index a0ab4002abcd..3bef977cb29b 100644 --- a/arch/x86/mach-voyager/setup.c +++ b/arch/x86/mach-voyager/setup.c @@ -18,7 +18,11 @@ void __init pre_intr_init_hook(void) /* * IRQ2 is cascade interrupt to second interrupt controller */ -static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; +static struct irqaction irq2 = { + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "cascade", +}; void __init intr_init_hook(void) { |