diff options
| -rw-r--r-- | drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 21 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/mdp/mdp_kms.h | 2 |
2 files changed, 17 insertions, 6 deletions
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c index 124aa1e62aa5..c2bdad88447e 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c @@ -191,6 +191,7 @@ const struct mdp5_cfg_hw apq8084_config = { .mdp = { .count = 1, .caps = MDP_CAP_SMP | + MDP_CAP_SRC_SPLIT | 0, }, .smp = { @@ -237,11 +238,13 @@ const struct mdp5_cfg_hw apq8084_config = { .base = { 0x03900, 0x03d00, 0x04100, 0x04500, 0x04900, 0x04d00 }, .instances = { { .id = 0, .pp = 0, .dspp = 0, - .caps = MDP_LM_CAP_DISPLAY, }, + .caps = MDP_LM_CAP_DISPLAY | + MDP_LM_CAP_PAIR, }, { .id = 1, .pp = 1, .dspp = 1, .caps = MDP_LM_CAP_DISPLAY, }, { .id = 2, .pp = 2, .dspp = 2, - .caps = MDP_LM_CAP_DISPLAY, }, + .caps = MDP_LM_CAP_DISPLAY | + MDP_LM_CAP_PAIR, }, { .id = 3, .pp = -1, .dspp = -1, .caps = MDP_LM_CAP_WB, }, { .id = 4, .pp = -1, .dspp = -1, @@ -350,6 +353,7 @@ const struct mdp5_cfg_hw msm8x94_config = { .mdp = { .count = 1, .caps = MDP_CAP_SMP | + MDP_CAP_SRC_SPLIT | 0, }, .smp = { @@ -396,11 +400,13 @@ const struct mdp5_cfg_hw msm8x94_config = { .base = { 0x44000, 0x45000, 0x46000, 0x47000, 0x48000, 0x49000 }, .instances = { { .id = 0, .pp = 0, .dspp = 0, - .caps = MDP_LM_CAP_DISPLAY, }, + .caps = MDP_LM_CAP_DISPLAY | + MDP_LM_CAP_PAIR, }, { .id = 1, .pp = 1, .dspp = 1, .caps = MDP_LM_CAP_DISPLAY, }, { .id = 2, .pp = 2, .dspp = 2, - .caps = MDP_LM_CAP_DISPLAY, }, + .caps = MDP_LM_CAP_DISPLAY | + MDP_LM_CAP_PAIR, }, { .id = 3, .pp = -1, .dspp = -1, .caps = MDP_LM_CAP_WB, }, { .id = 4, .pp = -1, .dspp = -1, @@ -443,6 +449,7 @@ const struct mdp5_cfg_hw msm8x96_config = { .count = 1, .caps = MDP_CAP_DSC | MDP_CAP_CDM | + MDP_CAP_SRC_SPLIT | 0, }, .ctl = { @@ -494,11 +501,13 @@ const struct mdp5_cfg_hw msm8x96_config = { .base = { 0x44000, 0x45000, 0x46000, 0x47000, 0x48000, 0x49000 }, .instances = { { .id = 0, .pp = 0, .dspp = 0, - .caps = MDP_LM_CAP_DISPLAY }, + .caps = MDP_LM_CAP_DISPLAY | + MDP_LM_CAP_PAIR, }, { .id = 1, .pp = 1, .dspp = 1, .caps = MDP_LM_CAP_DISPLAY, }, { .id = 2, .pp = 2, .dspp = -1, - .caps = MDP_LM_CAP_DISPLAY }, + .caps = MDP_LM_CAP_DISPLAY | + MDP_LM_CAP_PAIR, }, { .id = 3, .pp = -1, .dspp = -1, .caps = MDP_LM_CAP_WB, }, { .id = 4, .pp = -1, .dspp = -1, diff --git a/drivers/gpu/drm/msm/mdp/mdp_kms.h b/drivers/gpu/drm/msm/mdp/mdp_kms.h index bf4db664ee86..1185487e7e5e 100644 --- a/drivers/gpu/drm/msm/mdp/mdp_kms.h +++ b/drivers/gpu/drm/msm/mdp/mdp_kms.h @@ -104,6 +104,7 @@ const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format); #define MDP_CAP_SMP BIT(0) /* Shared Memory Pool */ #define MDP_CAP_DSC BIT(1) /* VESA Display Stream Compression */ #define MDP_CAP_CDM BIT(2) /* Chroma Down Module (HDMI 2.0 YUV) */ +#define MDP_CAP_SRC_SPLIT BIT(3) /* Source Split of SSPPs */ /* MDP pipe capabilities */ #define MDP_PIPE_CAP_HFLIP BIT(0) @@ -117,6 +118,7 @@ const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format); /* MDP layer mixer caps */ #define MDP_LM_CAP_DISPLAY BIT(0) #define MDP_LM_CAP_WB BIT(1) +#define MDP_LM_CAP_PAIR BIT(2) static inline bool pipe_supports_yuv(uint32_t pipe_caps) { |