diff options
| -rw-r--r-- | sound/soc/sh/rcar/core.c | 12 | ||||
| -rw-r--r-- | sound/soc/sh/rcar/ssi.c | 9 |
2 files changed, 7 insertions, 14 deletions
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c index 8e50b284230d..a96ebebd96de 100644 --- a/sound/soc/sh/rcar/core.c +++ b/sound/soc/sh/rcar/core.c @@ -274,10 +274,10 @@ u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io) struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); struct device *dev = rsnd_priv_to_dev(priv); - switch (runtime->sample_bits) { + switch (snd_pcm_format_width(runtime->format)) { case 16: return 8 << 16; - case 32: + case 24: return 0 << 16; } @@ -327,7 +327,7 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io) } /* Non target mod or 24bit data needs normal DALIGN */ - if ((runtime->sample_bits != 16) || + if ((snd_pcm_format_width(runtime->format) != 16) || (mod != target)) return 0x76543210; /* Target mod needs inverted DALIGN when 16bit */ @@ -362,12 +362,8 @@ u32 rsnd_get_busif_shift(struct rsnd_dai_stream *io, struct rsnd_mod *mod) * HW 24bit data is located as 0x******00 * */ - switch (runtime->sample_bits) { - case 16: + if (snd_pcm_format_width(runtime->format) == 16) return 0; - case 32: - break; - } for (i = 0; i < ARRAY_SIZE(playback_mods); i++) { tmod = rsnd_io_to_mod(io, mods[i]); diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c index f21202429000..5a70fdc3c680 100644 --- a/sound/soc/sh/rcar/ssi.c +++ b/sound/soc/sh/rcar/ssi.c @@ -370,11 +370,11 @@ static void rsnd_ssi_config_init(struct rsnd_mod *mod, if (rsnd_io_is_play(io)) cr_own |= TRMD; - switch (runtime->sample_bits) { + switch (snd_pcm_format_width(runtime->format)) { case 16: cr_own |= DWL_16; break; - case 32: + case 24: cr_own |= DWL_24; break; } @@ -677,11 +677,8 @@ static void __rsnd_ssi_interrupt(struct rsnd_mod *mod, rsnd_ssi_pointer_offset(mod, io, 0)); int shift = 0; - switch (runtime->sample_bits) { - case 32: + if (snd_pcm_format_width(runtime->format) == 24) shift = 8; - break; - } /* * 8/16/32 data can be assesse to TDR/RDR register |