diff options
| -rw-r--r-- | arch/powerpc/boot/dts/walnut.dts | 39 | ||||
| -rw-r--r-- | arch/powerpc/platforms/40x/Kconfig | 1 |
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts index 754fa3960f83..681633ec954f 100644 --- a/arch/powerpc/boot/dts/walnut.dts +++ b/arch/powerpc/boot/dts/walnut.dts @@ -190,6 +190,45 @@ virtual-reg = <f0300005>; }; }; + + PCI0: pci@ec000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; + primary; + reg = <eec00000 8 /* Config space access */ + eed80000 4 /* IACK */ + eed80000 4 /* Special cycle */ + ef480000 40>; /* Internal registers */ + + /* Outbound ranges, one memory and one IO, + * later cannot be changed. Chip supports a second + * IO range but we don't use it for now + */ + ranges = <02000000 0 80000000 80000000 0 20000000 + 01000000 0 00000000 e8000000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 80000000>; + + /* Walnut has all 4 IRQ pins tied together per slot */ + interrupt-map-mask = <f800 0 0 0>; + interrupt-map = < + /* IDSEL 1 */ + 0800 0 0 0 &UIC0 1c 8 + + /* IDSEL 2 */ + 1000 0 0 0 &UIC0 1d 8 + + /* IDSEL 3 */ + 1800 0 0 0 &UIC0 1e 8 + + /* IDSEL 4 */ + 2000 0 0 0 &UIC0 1f 8 + >; + }; }; chosen { diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig index b8f0a6c16486..84551ab979f0 100644 --- a/arch/powerpc/platforms/40x/Kconfig +++ b/arch/powerpc/platforms/40x/Kconfig @@ -59,6 +59,7 @@ config WALNUT depends on 40x default y select 405GP + select PCI help This option enables support for the IBM PPC405GP evaluation board. |