diff options
| -rw-r--r-- | arch/mips/kernel/cevt-gt641xx.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c index f5d265eb6eae..392ef3756c56 100644 --- a/arch/mips/kernel/cevt-gt641xx.c +++ b/arch/mips/kernel/cevt-gt641xx.c @@ -25,7 +25,7 @@ #include <asm/gt64120.h> #include <asm/time.h> -static DEFINE_SPINLOCK(gt641xx_timer_lock); +static DEFINE_RAW_SPINLOCK(gt641xx_timer_lock); static unsigned int gt641xx_base_clock; void gt641xx_set_base_clock(unsigned int clock) @@ -49,7 +49,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, { u32 ctrl; - spin_lock(>641xx_timer_lock); + raw_spin_lock(>641xx_timer_lock); ctrl = GT_READ(GT_TC_CONTROL_OFS); ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); @@ -58,7 +58,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, GT_WRITE(GT_TC0_OFS, delta); GT_WRITE(GT_TC_CONTROL_OFS, ctrl); - spin_unlock(>641xx_timer_lock); + raw_spin_unlock(>641xx_timer_lock); return 0; } @@ -68,7 +68,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode, { u32 ctrl; - spin_lock(>641xx_timer_lock); + raw_spin_lock(>641xx_timer_lock); ctrl = GT_READ(GT_TC_CONTROL_OFS); ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); @@ -86,7 +86,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode, GT_WRITE(GT_TC_CONTROL_OFS, ctrl); - spin_unlock(>641xx_timer_lock); + raw_spin_unlock(>641xx_timer_lock); } static void gt641xx_timer0_event_handler(struct clock_event_device *dev) |