diff options
| -rw-r--r-- | drivers/net/dsa/microchip/ksz9477_spi.c | 29 | ||||
| -rw-r--r-- | drivers/net/dsa/microchip/ksz_common.h | 32 |
2 files changed, 35 insertions, 26 deletions
diff --git a/drivers/net/dsa/microchip/ksz9477_spi.c b/drivers/net/dsa/microchip/ksz9477_spi.c index d1ffdf51d58c..5a9e27b337a8 100644 --- a/drivers/net/dsa/microchip/ksz9477_spi.c +++ b/drivers/net/dsa/microchip/ksz9477_spi.c @@ -14,37 +14,14 @@ #include <linux/spi/spi.h> #include "ksz_priv.h" +#include "ksz_common.h" #define SPI_ADDR_SHIFT 24 #define SPI_ADDR_ALIGN 3 #define SPI_TURNAROUND_SHIFT 5 -/* SPI frame opcodes */ -#define KS_SPIOP_RD 3 -#define KS_SPIOP_WR 2 - -#define KS_SPIOP_FLAG_MASK(opcode) \ - swab32((opcode) << (SPI_ADDR_SHIFT + SPI_TURNAROUND_SHIFT)) - -#define KSZ_REGMAP_COMMON(width) \ - { \ - .val_bits = (width), \ - .reg_stride = (width) / 8, \ - .reg_bits = SPI_ADDR_SHIFT + SPI_ADDR_ALIGN, \ - .pad_bits = SPI_TURNAROUND_SHIFT, \ - .max_register = BIT(SPI_ADDR_SHIFT) - 1, \ - .cache_type = REGCACHE_NONE, \ - .read_flag_mask = KS_SPIOP_FLAG_MASK(KS_SPIOP_RD), \ - .write_flag_mask = KS_SPIOP_FLAG_MASK(KS_SPIOP_WR), \ - .reg_format_endian = REGMAP_ENDIAN_BIG, \ - .val_format_endian = REGMAP_ENDIAN_BIG \ - } - -static const struct regmap_config ksz9477_regmap_config[] = { - KSZ_REGMAP_COMMON(8), - KSZ_REGMAP_COMMON(16), - KSZ_REGMAP_COMMON(32), -}; +KSZ_REGMAP_TABLE(ksz9477, 32, SPI_ADDR_SHIFT, + SPI_TURNAROUND_SHIFT, SPI_ADDR_ALIGN); static int ksz9477_spi_probe(struct spi_device *spi) { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index c3871ed9b097..745318424f71 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -133,4 +133,36 @@ static inline u32 ksz_pread32_poll(struct ksz_poll_ctx *ctx) return data; } +/* Regmap tables generation */ +#define KSZ_SPI_OP_RD 3 +#define KSZ_SPI_OP_WR 2 + +#define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \ + swab##swp((opcode) << ((regbits) + (regpad))) + +#define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \ + { \ + .val_bits = (width), \ + .reg_stride = (width) / 8, \ + .reg_bits = (regbits) + (regalign), \ + .pad_bits = (regpad), \ + .max_register = BIT(regbits) - 1, \ + .cache_type = REGCACHE_NONE, \ + .read_flag_mask = \ + KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \ + regbits, regpad), \ + .write_flag_mask = \ + KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ + regbits, regpad), \ + .reg_format_endian = REGMAP_ENDIAN_BIG, \ + .val_format_endian = REGMAP_ENDIAN_BIG \ + } + +#define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \ + static const struct regmap_config ksz##_regmap_config[] = { \ + KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \ + KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \ + KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \ + } + #endif |