diff options
-rw-r--r-- | Documentation/x86/intel_rdt_ui.txt | 7 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/intel_rdt.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/intel_rdt.h | 3 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/intel_rdt_rdtgroup.c | 16 |
4 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/x86/intel_rdt_ui.txt b/Documentation/x86/intel_rdt_ui.txt index 76f21e2ac176..4d8848e4e224 100644 --- a/Documentation/x86/intel_rdt_ui.txt +++ b/Documentation/x86/intel_rdt_ui.txt @@ -48,6 +48,13 @@ related to allocation: "min_cbm_bits": The minimum number of consecutive bits which must be set when writing a mask. +"shareable_bits": Bitmask of shareable resource with other executing + entities (e.g. I/O). User can use this when + setting up exclusive cache partitions. Note that + some platforms support devices that have their + own settings for cache use which can over-ride + these bits. + Memory bandwitdh(MB) subdirectory contains the following files with respect to allocation: diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c index de26aa7971d4..da4f3898d517 100644 --- a/arch/x86/kernel/cpu/intel_rdt.c +++ b/arch/x86/kernel/cpu/intel_rdt.c @@ -193,6 +193,7 @@ static inline bool cache_alloc_hsw_probe(void) r->num_closid = 4; r->default_ctrl = max_cbm; r->cache.cbm_len = 20; + r->cache.shareable_bits = 0xc0000; r->cache.min_cbm_bits = 2; r->alloc_capable = true; r->alloc_enabled = true; @@ -260,6 +261,7 @@ static void rdt_get_cache_alloc_cfg(int idx, struct rdt_resource *r) r->num_closid = edx.split.cos_max + 1; r->cache.cbm_len = eax.split.cbm_len + 1; r->default_ctrl = BIT_MASK(eax.split.cbm_len + 1) - 1; + r->cache.shareable_bits = ebx & r->default_ctrl; r->data_width = (r->cache.cbm_len + 3) / 4; r->alloc_capable = true; r->alloc_enabled = true; diff --git a/arch/x86/kernel/cpu/intel_rdt.h b/arch/x86/kernel/cpu/intel_rdt.h index 94e488af082e..4040bf1a075c 100644 --- a/arch/x86/kernel/cpu/intel_rdt.h +++ b/arch/x86/kernel/cpu/intel_rdt.h @@ -227,12 +227,15 @@ struct msr_param { * @cbm_idx_offset: Offset of CBM index. CBM index is computed by: * closid * cbm_idx_multi + cbm_idx_offset * in a cache bit mask + * @shareable_bits: Bitmask of shareable resource with other + * executing entities */ struct rdt_cache { unsigned int cbm_len; unsigned int min_cbm_bits; unsigned int cbm_idx_mult; unsigned int cbm_idx_offset; + unsigned int shareable_bits; }; /** diff --git a/arch/x86/kernel/cpu/intel_rdt_rdtgroup.c b/arch/x86/kernel/cpu/intel_rdt_rdtgroup.c index c24dd067b9c5..2621ae3f07fc 100644 --- a/arch/x86/kernel/cpu/intel_rdt_rdtgroup.c +++ b/arch/x86/kernel/cpu/intel_rdt_rdtgroup.c @@ -596,6 +596,15 @@ static int rdt_min_cbm_bits_show(struct kernfs_open_file *of, return 0; } +static int rdt_shareable_bits_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct rdt_resource *r = of->kn->parent->priv; + + seq_printf(seq, "%x\n", r->cache.shareable_bits); + return 0; +} + static int rdt_min_bw_show(struct kernfs_open_file *of, struct seq_file *seq, void *v) { @@ -712,6 +721,13 @@ static struct rftype res_common_files[] = { .fflags = RF_CTRL_INFO | RFTYPE_RES_CACHE, }, { + .name = "shareable_bits", + .mode = 0444, + .kf_ops = &rdtgroup_kf_single_ops, + .seq_show = rdt_shareable_bits_show, + .fflags = RF_CTRL_INFO | RFTYPE_RES_CACHE, + }, + { .name = "min_bandwidth", .mode = 0444, .kf_ops = &rdtgroup_kf_single_ops, |