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authorDavid S. Miller <davem@davemloft.net>2017-06-06 21:14:21 -0400
committerDavid S. Miller <davem@davemloft.net>2017-06-06 21:14:21 -0400
commit9747e2313838ee8f5d8073fd6aa7289255c3c51b (patch)
treeb0fb2db74a1881f13303261ddd9083328b7500df /tools
parent92046578ac88e0a93f8ef03240e6c832b0189aa7 (diff)
parent20b2af32ff3f0ac74f2bfd0bc2c175b56002d1f1 (diff)
Merge branch 'phylib-support-for-MV88X3310-10G-phy'
Russell King says: ==================== net: Add phylib support for MV88X3310 10G phy This patch series adds support for the Marvell 88x3310 PHY found on the SolidRun Macchiatobin board. The first patch introduces a set of generic Clause 45 PHY helpers that C45 PHY drivers can make use of if they wish. Patch 2 ensures that the Clause 22 aneg_done function will not be called for incompatible Clause 45 PHYs. Patch 3 fixes the aneg restart to be compatible with C45 PHYs - it can currently only cope with C22 PHYs. Patch 4 moves the "gen10g" driver into the Clause 45 code, grouping all core clause 45 code together. Patch 5 adds the phy_interface_t types for XAUI and 10GBase-KR links. As 10GBase-KR appears to be compatible with XFI and SFI, XFI and SFI, I currently see no reason to add XFI and SFI interface modes. There seems to be vendor code out there using these, but they all alias back to the same hardware settings. Patch 6 adds support for the MV88X3310 PHY, which supports both the copper and fiber interfaces. It should be noted that the MV88X3310 automatically switches its MAC facing interface between 10GBase-KR and SGMII depending on the negotiated speed. This was discussed with Florian, and we agreed to update the phy interface mode depending on the properties of the actual link mode to the PHY. v2: - update sysfs-class-net-phydev documentation - avoid genphy_aneg_done for non-C22 PHYs - expand comment about 0x30 constant - add comment about lack of reset - configure driver using MARVELL_10G_PHY ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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