diff options
| author | Len Brown <len.brown@intel.com> | 2015-11-21 12:22:47 -0500 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2016-02-17 01:41:53 -0500 |
| commit | 69807a638f91524ed75027f808cd277417ecee7a (patch) | |
| tree | 8a5419313c0f446de6b1a71c6b70d90436785818 /tools/power | |
| parent | afd2ff9b7e1b367172f18ba7f693dfb62bdcb2dc (diff) | |
tools/power turbostat: decode more CPUID fields
for debugging, dump a few more fields:
CPUID(1): SSE3 MONITOR EIST TM2 TSC MSR ACPI-TM TM
cpu0: MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST MONITOR)
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power')
| -rw-r--r-- | tools/power/x86/turbostat/turbostat.c | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 0dac7e05a6ac..7ef8b9feb7f2 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -2673,6 +2673,19 @@ guess: return 0; } + +void decode_misc_enable_msr(void) +{ + unsigned long long msr; + + if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr)) + fprintf(stderr, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n", + base_cpu, msr, + msr & (1 << 3) ? "TCC" : "", + msr & (1 << 16) ? "EIST" : "", + msr & (1 << 18) ? "MONITOR" : ""); +} + void process_cpuid() { unsigned int eax, ebx, ecx, edx, max_level; @@ -2696,9 +2709,19 @@ void process_cpuid() if (family == 6 || family == 0xf) model += ((fms >> 16) & 0xf) << 4; - if (debug) + if (debug) { fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n", max_level, family, model, stepping, family, model, stepping); + fprintf(stderr, "CPUID(1): %s %s %s %s %s %s %s %s\n", + ecx & (1 << 0) ? "SSE3" : "-", + ecx & (1 << 3) ? "MONITOR" : "-", + ecx & (1 << 7) ? "EIST" : "-", + ecx & (1 << 8) ? "TM2" : "-", + edx & (1 << 4) ? "TSC" : "-", + edx & (1 << 5) ? "MSR" : "-", + edx & (1 << 22) ? "ACPI-TM" : "-", + edx & (1 << 29) ? "TM" : "-"); + } if (!(edx & (1 << 5))) errx(1, "CPUID: no MSR"); @@ -2739,6 +2762,9 @@ void process_cpuid() do_ptm ? "" : "No ", has_epb ? "" : "No "); + if (debug) + decode_misc_enable_msr(); + if (max_level > 0x15) { unsigned int eax_crystal; unsigned int ebx_tsc; |