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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2018-05-24 09:30:15 -0700
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2018-05-24 09:30:15 -0700
commit754451342fc5954061ede74b0a8485ec4a4c6eaa (patch)
tree82daccba5779de492631c42e47a614bd9d4cddd2 /tools/memory-model/litmus-tests/SB+mbonceonces.litmus
parentbf232e460a3530adf17da7d7f1332347b73a3d08 (diff)
parent771c577c23bac90597c685971d7297ea00f99d11 (diff)
Merge tag 'v4.17-rc6' into next
Sync up with mainline to bring in Atmel controller changes for Caroline.
Diffstat (limited to 'tools/memory-model/litmus-tests/SB+mbonceonces.litmus')
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1 files changed, 32 insertions, 0 deletions
diff --git a/tools/memory-model/litmus-tests/SB+mbonceonces.litmus b/tools/memory-model/litmus-tests/SB+mbonceonces.litmus
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+++ b/tools/memory-model/litmus-tests/SB+mbonceonces.litmus
@@ -0,0 +1,32 @@
+C SB+mbonceonces
+
+(*
+ * Result: Never
+ *
+ * This litmus test demonstrates that full memory barriers suffice to
+ * order the store-buffering pattern, where each process writes to the
+ * variable that the preceding process reads. (Locking and RCU can also
+ * suffice, but not much else.)
+ *)
+
+{}
+
+P0(int *x, int *y)
+{
+ int r0;
+
+ WRITE_ONCE(*x, 1);
+ smp_mb();
+ r0 = READ_ONCE(*y);
+}
+
+P1(int *x, int *y)
+{
+ int r0;
+
+ WRITE_ONCE(*y, 1);
+ smp_mb();
+ r0 = READ_ONCE(*x);
+}
+
+exists (0:r0=0 /\ 1:r0=0)