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authorOlivier Moysan <olivier.moysan@st.com>2019-02-26 14:51:06 +0100
committerMark Brown <broonie@kernel.org>2019-02-26 15:41:17 +0000
commitebf629d502cf7aa138b86f36dc016faf6c8e39e3 (patch)
treea12a630de5dcef07afb64901d761c56f78c5c906 /sound
parent0c4c68d6fa1bae74d450e50823c24fcc3cd0b171 (diff)
ASoC: stm32: i2s: fix stream count management
Move counter handling to trigger start section to manage multiple start/stop events. Signed-off-by: Olivier Moysan <olivier.moysan@st.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/stm/stm32_i2s.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/sound/soc/stm/stm32_i2s.c b/sound/soc/stm/stm32_i2s.c
index 7d4c67433916..7f56d7b51ba3 100644
--- a/sound/soc/stm/stm32_i2s.c
+++ b/sound/soc/stm/stm32_i2s.c
@@ -554,10 +554,6 @@ static int stm32_i2s_startup(struct snd_pcm_substream *substream,
return ret;
}
- spin_lock(&i2s->lock_fd);
- i2s->refcount++;
- spin_unlock(&i2s->lock_fd);
-
return regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
I2S_IFCR_MASK, I2S_IFCR_MASK);
}
@@ -613,18 +609,19 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
I2S_IFCR_MASK, I2S_IFCR_MASK);
+ spin_lock(&i2s->lock_fd);
+ i2s->refcount++;
if (playback_flg) {
ier = I2S_IER_UDRIE;
} else {
ier = I2S_IER_OVRIE;
- spin_lock(&i2s->lock_fd);
if (i2s->refcount == 1)
/* dummy write to trigger capture */
regmap_write(i2s->regmap,
STM32_I2S_TXDR_REG, 0);
- spin_unlock(&i2s->lock_fd);
}
+ spin_unlock(&i2s->lock_fd);
if (STM32_I2S_IS_SLAVE(i2s))
ier |= I2S_IER_TIFREIE;
@@ -649,7 +646,6 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
spin_unlock(&i2s->lock_fd);
break;
}
- spin_unlock(&i2s->lock_fd);
dev_dbg(cpu_dai->dev, "stop I2S\n");
@@ -657,8 +653,10 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
I2S_CR1_SPE, 0);
if (ret < 0) {
dev_err(cpu_dai->dev, "Error %d disabling I2S\n", ret);
+ spin_unlock(&i2s->lock_fd);
return ret;
}
+ spin_unlock(&i2s->lock_fd);
cfg1_mask = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN;
regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,