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authorSylwester Nawrocki <s.nawrocki@samsung.com>2014-07-10 18:11:13 +0200
committerMark Brown <broonie@linaro.org>2014-07-11 14:04:03 +0100
commitb97c60abf9a561f86ae71bd741add02673cc1a08 (patch)
tree851e1dcb759881e00193956e9cf30a0ec8779e74 /sound
parentd3d4e5247b013008a39e4d5f69ce4c60ed57f997 (diff)
ASoC: samsung-i2s: Maintain CDCLK settings across i2s_{shutdown/startup}
Currently configuration of the CDCLK pad is being overwritten in the i2s_shutdown() callback in order to gate the SoC output clock. However if an ASoC machine driver doesn't restore that clock settings each time after opening the sound device this results in the CDCLK pin being permanently configured into input mode. I.e. the output clock will always stay disabled. Fix that by saving the CDCLKCON bit state in i2s_shutdown() and and restoring it in the i2s_startup() callback. Signed-off-by: Chen Zhen <zhen1.chen@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/samsung/i2s.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 5f9b255a8b38..d2533dbc8399 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -68,6 +68,8 @@ struct i2s_dai {
#define DAI_OPENED (1 << 0) /* Dai is opened */
#define DAI_MANAGER (1 << 1) /* Dai is the manager */
unsigned mode;
+ /* CDCLK pin direction: 0 - input, 1 - output */
+ unsigned int cdclk_out:1;
/* Driver for this DAI */
struct snd_soc_dai_driver i2s_dai_drv;
/* DMA parameters */
@@ -737,6 +739,9 @@ static int i2s_startup(struct snd_pcm_substream *substream,
spin_unlock_irqrestore(&lock, flags);
+ if (!is_opened(other) && i2s->cdclk_out)
+ i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
+ 0, SND_SOC_CLOCK_OUT);
return 0;
}
@@ -752,9 +757,13 @@ static void i2s_shutdown(struct snd_pcm_substream *substream,
i2s->mode &= ~DAI_OPENED;
i2s->mode &= ~DAI_MANAGER;
- if (is_opened(other))
+ if (is_opened(other)) {
other->mode |= DAI_MANAGER;
-
+ } else {
+ u32 mod = readl(i2s->addr + I2SMOD);
+ i2s->cdclk_out = !(mod & MOD_CDCLKCON);
+ other->cdclk_out = i2s->cdclk_out;
+ }
/* Reset any constraint on RFS and BFS */
i2s->rfs = 0;
i2s->bfs = 0;