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authorHans de Goede <hdegoede@redhat.com>2018-02-25 11:46:49 +0100
committerMark Brown <broonie@kernel.org>2018-03-01 19:13:02 +0000
commit984c803f9a2ad6f1d2bea0b7ef2e3c18d69fbdfd (patch)
tree369636aa90017bf01eaeaf6e0c3b4f2829bed6e0 /sound
parentd082174c99e77beb06a51c90ac61934554e516e1 (diff)
ASoC: rt5651: Fix bias_level confusion
The rt5651_set_bias_level() function was turning everything off at SND_SOC_BIAS_STANDBY, rather then at SND_SOC_BIAS_OFF, requiring the bias- level to be raised to SND_SOC_BIAS_PREPARE before turning anything on. This is not how the bias-levels are supposed to work, this commit fixes this by turning everything off at the SND_SOC_BIAS_OFF level and enabling the pwr-bits needed for minimum functionality at SND_SOC_BIAS_STANDBY. This fixes the minimum set of pwr-bits not getting enabled when force-enabling some dapm-supplies (e.g. for jack type detection), which raises the bias-level to standby. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/rt5651.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/sound/soc/codecs/rt5651.c b/sound/soc/codecs/rt5651.c
index 8548f9406520..c565607f95f7 100644
--- a/sound/soc/codecs/rt5651.c
+++ b/sound/soc/codecs/rt5651.c
@@ -1526,6 +1526,13 @@ static int rt5651_set_bias_level(struct snd_soc_component *component,
switch (level) {
case SND_SOC_BIAS_PREPARE:
if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
+ if (snd_soc_component_read32(component, RT5651_PLL_MODE_1) & 0x9200)
+ snd_soc_component_update_bits(component, RT5651_D_MISC,
+ 0xc00, 0xc00);
+ }
+ break;
+ case SND_SOC_BIAS_STANDBY:
+ if (SND_SOC_BIAS_OFF == snd_soc_component_get_bias_level(component)) {
snd_soc_component_update_bits(component, RT5651_PWR_ANLG1,
RT5651_PWR_VREF1 | RT5651_PWR_MB |
RT5651_PWR_BG | RT5651_PWR_VREF2,
@@ -1539,13 +1546,10 @@ static int rt5651_set_bias_level(struct snd_soc_component *component,
RT5651_PWR_LDO_DVO_MASK,
RT5651_PWR_LDO_DVO_1_2V);
snd_soc_component_update_bits(component, RT5651_D_MISC, 0x1, 0x1);
- if (snd_soc_component_read32(component, RT5651_PLL_MODE_1) & 0x9200)
- snd_soc_component_update_bits(component, RT5651_D_MISC,
- 0xc00, 0xc00);
}
break;
- case SND_SOC_BIAS_STANDBY:
+ case SND_SOC_BIAS_OFF:
snd_soc_component_write(component, RT5651_D_MISC, 0x0010);
snd_soc_component_write(component, RT5651_PWR_DIG1, 0x0000);
snd_soc_component_write(component, RT5651_PWR_DIG2, 0x0000);