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authorAlex Williamson <alex.williamson@redhat.com>2013-12-17 16:43:51 -0700
committerBjorn Helgaas <bhelgaas@google.com>2013-12-17 17:39:08 -0700
commit425c1b223dac456d00a61fd6b451b6d1cf00d065 (patch)
treee37ad3a93cd1e034275e310f0004ff7bc4392e8a /sound
parentfd0f7f73ca96bb0f8723b5e59759ad43bab88954 (diff)
PCI: Add Virtual Channel to save/restore support
While we don't really have any infrastructure for making use of VC support, the system BIOS can configure the topology to non-default VC values prior to boot. This may be due to silicon bugs, desire to reserve traffic classes, or perhaps just BIOS bugs. When we reset devices, the VC configuration may return to default values, which can be incompatible with devices upstream. For instance, Nvidia GRID cards provide a PCIe switch and some number of GPUs, all supporting VC. The power-on default for VC is to support TC0-7 across VC0, however some platforms will only enable TC0/VC0 mapping across the topology. When we do a secondary bus reset on the downstream switch port, the GPU is reset to a TC0-7/VC0 mapping while the opposite end of the link only enables TC0/VC0. If the GPU attempts to use TC1-7, it fails. This patch attempts to provide complete support for VC save/restore, even beyond the minimally required use case above. This includes save/restore and reload of the arbitration table, save/restore and reload of the port arbitration tables, and re-enabling of the channels for VC, VC9, and MFVC capabilities. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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