diff options
| author | Bard Liao <bardliao@realtek.com> | 2017-03-20 10:20:54 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2017-03-20 11:25:23 +0000 |
| commit | 17febfa6071bc673892edda6b1998ccfc7456c4e (patch) | |
| tree | 2b18dc6d7edb287ea9a39c441c342628b58356ec /sound/soc | |
| parent | 9b5d3865b3b410d21213807642b47e84a3fc081b (diff) | |
ASoC: rt5665: fix wrong pre div reg of IF2 and IF3
The pre divider control register of IF1 and IF2/3 are different.
The driver used the same register for all interfaces which was a
mistake.
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc')
| -rw-r--r-- | sound/soc/codecs/rt5665.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/sound/soc/codecs/rt5665.c b/sound/soc/codecs/rt5665.c index 5545d084b0b6..285ec7495379 100644 --- a/sound/soc/codecs/rt5665.c +++ b/sound/soc/codecs/rt5665.c @@ -4080,7 +4080,7 @@ static int rt5665_hw_params(struct snd_pcm_substream *substream, { struct snd_soc_codec *codec = dai->codec; struct rt5665_priv *rt5665 = snd_soc_codec_get_drvdata(codec); - unsigned int val_len = 0, val_clk, mask_clk, val_bits = 0x0100; + unsigned int val_len = 0, val_clk, reg_clk, mask_clk, val_bits = 0x0100; int pre_div, frame_size; rt5665->lrck[dai->id] = params_rate(params); @@ -4124,6 +4124,7 @@ static int rt5665_hw_params(struct snd_pcm_substream *substream, if (params_channels(params) > 2) rt5665_set_tdm_slot(dai, 0xf, 0xf, params_channels(params), params_width(params)); + reg_clk = RT5665_ADDA_CLK_1; mask_clk = RT5665_I2S_PD1_MASK; val_clk = pre_div << RT5665_I2S_PD1_SFT; snd_soc_update_bits(codec, RT5665_I2S1_SDP, @@ -4131,12 +4132,14 @@ static int rt5665_hw_params(struct snd_pcm_substream *substream, break; case RT5665_AIF2_1: case RT5665_AIF2_2: + reg_clk = RT5665_ADDA_CLK_2; mask_clk = RT5665_I2S_PD2_MASK; val_clk = pre_div << RT5665_I2S_PD2_SFT; snd_soc_update_bits(codec, RT5665_I2S2_SDP, RT5665_I2S_DL_MASK, val_len); break; case RT5665_AIF3: + reg_clk = RT5665_ADDA_CLK_2; mask_clk = RT5665_I2S_PD3_MASK; val_clk = pre_div << RT5665_I2S_PD3_SFT; snd_soc_update_bits(codec, RT5665_I2S3_SDP, @@ -4147,7 +4150,7 @@ static int rt5665_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - snd_soc_update_bits(codec, RT5665_ADDA_CLK_1, mask_clk, val_clk); + snd_soc_update_bits(codec, reg_clk, mask_clk, val_clk); snd_soc_update_bits(codec, RT5665_STO1_DAC_SIL_DET, 0x3700, val_bits); switch (rt5665->lrck[dai->id]) { |