diff options
author | Srinivasa Rao Mandadapu <srivasam@codeaurora.org> | 2020-11-23 21:47:53 +0530 |
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committer | Mark Brown <broonie@kernel.org> | 2020-11-23 18:37:34 +0000 |
commit | b1824968221ccc498625750d8c49cf0d7d39a4de (patch) | |
tree | c524373159c97ff68d7e92a85a53c5031e52f6a8 /sound/soc/qcom/lpass-lpaif-reg.h | |
parent | fbdae7d6d04d2db36c687723920f612e93b2cbda (diff) |
ASoC: qcom: Fix enabling BCLK and LRCLK in LPAIF invalid state
Fix enabling BCLK and LRCLK only when LPAIF is invalid state and
bit clock in enable state.
In device suspend/resume scenario LPAIF is going to reset state.
which is causing LRCLK disable and BCLK enable.
Avoid such inconsitency by removing unnecessary cpu dai prepare API,
which is doing LRCLK enable, and by maintaining BLCK state information.
Fixes: 7e6799d8f87d ("ASoC: qcom: lpass-cpu: Enable MI2S BCLK and LRCLK together")
Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org>
Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
Link: https://lore.kernel.org/r/1606148273-17325-1-git-send-email-srivasam@codeaurora.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/qcom/lpass-lpaif-reg.h')
-rw-r--r-- | sound/soc/qcom/lpass-lpaif-reg.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sound/soc/qcom/lpass-lpaif-reg.h b/sound/soc/qcom/lpass-lpaif-reg.h index 08f3fe508b85..405542832e99 100644 --- a/sound/soc/qcom/lpass-lpaif-reg.h +++ b/sound/soc/qcom/lpass-lpaif-reg.h @@ -60,6 +60,13 @@ #define LPAIF_I2SCTL_BITWIDTH_24 1 #define LPAIF_I2SCTL_BITWIDTH_32 2 +#define LPAIF_BIT_CLK_DISABLE 0 +#define LPAIF_BIT_CLK_ENABLE 1 + +#define LPAIF_I2SCTL_RESET_STATE 0x003C0004 +#define LPAIF_DMACTL_RESET_STATE 0x00200000 + + /* LPAIF IRQ */ #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ (v->irq_reg_base + (addr) + v->irq_reg_stride * (port)) |