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authorTakashi Iwai <tiwai@suse.de>2018-06-05 16:51:55 +0200
committerTakashi Iwai <tiwai@suse.de>2018-06-05 16:51:55 +0200
commitd4d5a1cd298e67cb68cca8dc7dd1ea3942cce3ff (patch)
tree282417771a28cb3d88fdd3246d9b778f1e3e8fd3 /sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
parent7a6fc28b162bc0e48d8cef72be8226e11300317b (diff)
parentaac521e880f221e6d4e67b7061022dbecace0df0 (diff)
Merge tag 'asoc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v4.18 This is a very big update, mainly due to a huge set of new drivers some of which are individually very large. We also have a lot of fixes for the topology stuff, several of the users have stepped up and fixed some the serious issues there, and continued progress on the transition away from CODEC specific drivers to generic component drivers. - Many fixes for the topology code, including fixes for the half done v4 ABI compatibility from Guenter Roeck and other ABI fixes from Kirill Marinushkin. - Lots of cleanup for Intel platforms based on Realtek CODECs from Hans de Goode. - More followups on removing legacy CODEC things and transitioning to components from Morimoto-san. - Conversion of OMAP DMA to the new, more standard SDMA-PCM driver. - A series of fixes and updates to the rather elderly Cirrus Logic SoC drivers from Alexander Sverdlin. - Qualcomm DSP support from Srinivas Kandagatla. - New drivers for Analog SSM2305, Atmel I2S controllers, Mediatek MT6351, MT6797 and MT7622, Qualcomm DSPs, Realtek RT1305, RT1306 and RT5668 and TI TSCS454
Diffstat (limited to 'sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c')
-rw-r--r--sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c66
1 files changed, 33 insertions, 33 deletions
diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c b/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
index 949fc3a1d025..ae620890bb3a 100644
--- a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
+++ b/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
@@ -1,17 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* mt2701-afe-clock-ctrl.c -- Mediatek 2701 afe clock ctrl
*
* Copyright (c) 2016 MediaTek Inc.
* Author: Garlic Tseng <garlic.tseng@mediatek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
+ * Ryder Lee <ryder.lee@mediatek.com>
*/
#include "mt2701-afe-common.h"
@@ -43,8 +36,9 @@ int mt2701_init_clock(struct mtk_base_afe *afe)
}
/* Get I2S related clocks */
- for (i = 0; i < MT2701_I2S_NUM; i++) {
+ for (i = 0; i < afe_priv->soc->i2s_num; i++) {
struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[i];
+ struct clk *i2s_ck;
char name[13];
snprintf(name, sizeof(name), "i2s%d_src_sel", i);
@@ -69,18 +63,20 @@ int mt2701_init_clock(struct mtk_base_afe *afe)
}
snprintf(name, sizeof(name), "i2so%d_hop_ck", i);
- i2s_path->hop_ck[I2S_OUT] = devm_clk_get(afe->dev, name);
- if (IS_ERR(i2s_path->hop_ck[I2S_OUT])) {
+ i2s_ck = devm_clk_get(afe->dev, name);
+ if (IS_ERR(i2s_ck)) {
dev_err(afe->dev, "failed to get %s\n", name);
- return PTR_ERR(i2s_path->hop_ck[I2S_OUT]);
+ return PTR_ERR(i2s_ck);
}
+ i2s_path->hop_ck[SNDRV_PCM_STREAM_PLAYBACK] = i2s_ck;
snprintf(name, sizeof(name), "i2si%d_hop_ck", i);
- i2s_path->hop_ck[I2S_IN] = devm_clk_get(afe->dev, name);
- if (IS_ERR(i2s_path->hop_ck[I2S_IN])) {
+ i2s_ck = devm_clk_get(afe->dev, name);
+ if (IS_ERR(i2s_ck)) {
dev_err(afe->dev, "failed to get %s\n", name);
- return PTR_ERR(i2s_path->hop_ck[I2S_IN]);
+ return PTR_ERR(i2s_ck);
}
+ i2s_path->hop_ck[SNDRV_PCM_STREAM_CAPTURE] = i2s_ck;
snprintf(name, sizeof(name), "asrc%d_out_ck", i);
i2s_path->asrco_ck = devm_clk_get(afe->dev, name);
@@ -102,10 +98,10 @@ int mt2701_init_clock(struct mtk_base_afe *afe)
return 0;
}
-int mt2701_afe_enable_i2s(struct mtk_base_afe *afe, int id, int dir)
+int mt2701_afe_enable_i2s(struct mtk_base_afe *afe,
+ struct mt2701_i2s_path *i2s_path,
+ int dir)
{
- struct mt2701_afe_private *afe_priv = afe->platform_priv;
- struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[id];
int ret;
ret = clk_prepare_enable(i2s_path->asrco_ck);
@@ -128,11 +124,10 @@ err_hop_ck:
return ret;
}
-void mt2701_afe_disable_i2s(struct mtk_base_afe *afe, int id, int dir)
+void mt2701_afe_disable_i2s(struct mtk_base_afe *afe,
+ struct mt2701_i2s_path *i2s_path,
+ int dir)
{
- struct mt2701_afe_private *afe_priv = afe->platform_priv;
- struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[id];
-
clk_disable_unprepare(i2s_path->hop_ck[dir]);
clk_disable_unprepare(i2s_path->asrco_ck);
}
@@ -272,27 +267,32 @@ int mt2701_afe_disable_clock(struct mtk_base_afe *afe)
return 0;
}
-void mt2701_mclk_configuration(struct mtk_base_afe *afe, int id, int domain,
- int mclk)
+int mt2701_mclk_configuration(struct mtk_base_afe *afe, int id)
+
{
struct mt2701_afe_private *priv = afe->platform_priv;
struct mt2701_i2s_path *i2s_path = &priv->i2s_path[id];
- int ret;
+ int ret = -EINVAL;
/* Set mclk source */
- if (domain == 0)
+ if (!(MT2701_PLL_DOMAIN_0_RATE % i2s_path->mclk_rate))
ret = clk_set_parent(i2s_path->sel_ck,
priv->base_ck[MT2701_TOP_AUD_MCLK_SRC0]);
- else
+ else if (!(MT2701_PLL_DOMAIN_1_RATE % i2s_path->mclk_rate))
ret = clk_set_parent(i2s_path->sel_ck,
priv->base_ck[MT2701_TOP_AUD_MCLK_SRC1]);
- if (ret)
- dev_err(afe->dev, "failed to set domain%d mclk source %d\n",
- domain, ret);
+ if (ret) {
+ dev_err(afe->dev, "failed to set mclk source\n");
+ return ret;
+ }
/* Set mclk divider */
- ret = clk_set_rate(i2s_path->div_ck, mclk);
- if (ret)
+ ret = clk_set_rate(i2s_path->div_ck, i2s_path->mclk_rate);
+ if (ret) {
dev_err(afe->dev, "failed to set mclk divider %d\n", ret);
+ return ret;
+ }
+
+ return 0;
}