diff options
| author | Jie Yang <yang.jie@intel.com> | 2014-07-14 17:11:12 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2014-07-14 19:12:09 +0100 |
| commit | 85e63007bbef7abc7145c807ed59d01738e09d39 (patch) | |
| tree | d2ce8df4604a5b0e61f9a9bb35894ebc6401be0e /sound/soc/intel/sst-haswell-dsp.c | |
| parent | 548793232fd29cfa1553bb45247aa5963632405c (diff) | |
ASoC: Intel: Start with all memory banks disabled
All required banks are enabled during boot procedure.
Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/intel/sst-haswell-dsp.c')
| -rw-r--r-- | sound/soc/intel/sst-haswell-dsp.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/sound/soc/intel/sst-haswell-dsp.c b/sound/soc/intel/sst-haswell-dsp.c index 40bb0205d5c0..977e29779d11 100644 --- a/sound/soc/intel/sst-haswell-dsp.c +++ b/sound/soc/intel/sst-haswell-dsp.c @@ -505,8 +505,9 @@ static int hsw_init(struct sst_dsp *sst, struct sst_pdata *pdata) } } - /* set default power gating mask */ - writel(0x0, sst->addr.pci_cfg + SST_VDRTCTL0); + /* set default power gating control, enable power gating control for all blocks. that is, + can't be accessed, please enable each block before accessing. */ + writel(0xffffffff, sst->addr.pci_cfg + SST_VDRTCTL0); return 0; } |