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authorLinus Torvalds <torvalds@linux-foundation.org>2020-01-27 17:28:52 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2020-01-27 17:28:52 -0800
commitb0be0eff1a5ab77d588b76bd8b1c92d5d17b3f73 (patch)
treef663e1cc2caa0fd2bb495868d02d09e21045d676 /sound/soc/intel/skylake/skl-sst-cldma.c
parent3d3b44a61a9cfd268fc071ea1b1c5dfea7ed133d (diff)
parenta84de2fa962c1b0551653fe245d6cb5f6129179c (diff)
Merge tag 'x86-pti-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 pti updates from Thomas Gleixner: "The performance deterioration departement provides a few non-scary fixes and improvements: - Update the cached HLE state when the TSX state is changed via the new control register. This ensures feature bit consistency. - Exclude the new Zhaoxin CPUs from Spectre V2 and SWAPGS vulnerabilities" * tag 'x86-pti-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/speculation/swapgs: Exclude Zhaoxin CPUs from SWAPGS vulnerability x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2 x86/cpu: Update cached HLE state on write to TSX_CTRL_CPUID_CLEAR
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