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author | Takashi Sakamoto <o-takashi@sakamocchi.jp> | 2021-05-31 11:51:02 +0900 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2021-06-01 08:19:37 +0200 |
commit | a9dd8a61b6b1fdf334d0cc63672b3ffac3827f18 (patch) | |
tree | 23f18200c29b3856108e6afe74bd97515323eab6 /sound/firewire | |
parent | 019af5923c8a46b581fc2f2d670dcc0714a80bf0 (diff) |
ALSA: firewire-tascam: perform sequence replay for media clock recovery
This commit takes ALSA firewire-tascam driver to perform sequence replay
for media clock recovery.
The protocol specific to Tascam FireWire series is not compliant to
IEC 61883-1/6 in terms of syt field of CIP. The protocol doesn't use
presentation time in received CIP for playback timing. The sequence of
the number of data blocks per packet is important for media clock
recovery.
Although the devices in Tascam FireWire series transfer packets
regardless of receiving packets, the tx packets includes no events
in the beginning of streaming. It takes so long to multiplex any event
into the packet after receiving the sequence of packets. As long as I
experienced, it takes several thousands of isochronous cycle. Furthermore,
just after changing sampling transmission frequency, it stops multiplexing
event at once, then starts multiplexing again.
The sequence replay is tested with below models:
* FW-1884
* FW-1804
* FW-1082
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Link: https://lore.kernel.org/r/20210531025103.17880-6-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/firewire')
-rw-r--r-- | sound/firewire/tascam/tascam-stream.c | 21 | ||||
-rw-r--r-- | sound/firewire/tascam/tascam.h | 1 |
2 files changed, 20 insertions, 2 deletions
diff --git a/sound/firewire/tascam/tascam-stream.c b/sound/firewire/tascam/tascam-stream.c index 4811b60e5823..53e094cc411f 100644 --- a/sound/firewire/tascam/tascam-stream.c +++ b/sound/firewire/tascam/tascam-stream.c @@ -11,7 +11,7 @@ #define CLOCK_STATUS_MASK 0xffff0000 #define CLOCK_CONFIG_MASK 0x0000ffff -#define READY_TIMEOUT_MS 500 +#define READY_TIMEOUT_MS 4000 static int get_clock(struct snd_tscm *tscm, u32 *data) { @@ -423,6 +423,8 @@ int snd_tscm_stream_reserve_duplex(struct snd_tscm *tscm, unsigned int rate, fw_iso_resources_free(&tscm->rx_resources); return err; } + + tscm->need_long_tx_init_skip = (rate != curr_rate); } return 0; @@ -454,6 +456,7 @@ int snd_tscm_stream_start_duplex(struct snd_tscm *tscm, unsigned int rate) if (!amdtp_stream_running(&tscm->rx_stream)) { int spd = fw_parent_device(tscm->unit)->max_speed; + unsigned int tx_init_skip_cycles; err = set_stream_formats(tscm, rate); if (err < 0) @@ -473,7 +476,19 @@ int snd_tscm_stream_start_duplex(struct snd_tscm *tscm, unsigned int rate) if (err < 0) goto error; - err = amdtp_domain_start(&tscm->domain, 0, false, false); + if (tscm->need_long_tx_init_skip) + tx_init_skip_cycles = 16000; + else + tx_init_skip_cycles = 0; + + // MEMO: Just after starting packet streaming, it transfers packets without any + // event. Enough after receiving the sequence of packets, it multiplexes events into + // the packet. However, just after changing sampling transfer frequency, it stops + // multiplexing during packet transmission. Enough after, it restarts multiplexing + // again. The device ignores presentation time expressed by the value of syt field + // of CIP header in received packets. The sequence of the number of data blocks per + // packet is important for media clock recovery. + err = amdtp_domain_start(&tscm->domain, tx_init_skip_cycles, true, true); if (err < 0) return err; @@ -499,6 +514,8 @@ void snd_tscm_stream_stop_duplex(struct snd_tscm *tscm) fw_iso_resources_free(&tscm->tx_resources); fw_iso_resources_free(&tscm->rx_resources); + + tscm->need_long_tx_init_skip = false; } } diff --git a/sound/firewire/tascam/tascam.h b/sound/firewire/tascam/tascam.h index 78b7a08986a1..28dad4eae9c9 100644 --- a/sound/firewire/tascam/tascam.h +++ b/sound/firewire/tascam/tascam.h @@ -99,6 +99,7 @@ struct snd_tscm { unsigned int push_pos; struct amdtp_domain domain; + bool need_long_tx_init_skip; }; #define TSCM_ADDR_BASE 0xffff00000000ull |