diff options
| author | Jungseung Lee <js07.lee@samsung.com> | 2020-03-18 21:06:14 +0900 |
|---|---|---|
| committer | Tudor Ambarus <tudor.ambarus@microchip.com> | 2020-03-24 11:47:42 +0200 |
| commit | 05635c14a292de0e1a221dc31c04aba3913f03c8 (patch) | |
| tree | 0ba072883421d983b78f4d99c381d834093911fb /scripts/tags.sh | |
| parent | 2d284768b49bcf1c643c08a201ff2161041178ef (diff) | |
mtd: spi-nor: Add SR 4bit block protection support
Currently we are supporting block protection only for flash chips with
3 block protection bits (BP0-2) in the SR register.
Enable block protection support for flashes with 4 block protection bits
(BP0-3).
Add a flash_info flag for flashes that describe 4 block protection bits.
Add another flash_info flag for flashes in which BP3 bit is not adjacent
to the BP0-2 bits.
Tested with a n25q512ax3 (BP0-3) and w25q128 (BP0-2).
Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'scripts/tags.sh')
0 files changed, 0 insertions, 0 deletions