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authorLinus Torvalds <torvalds@linux-foundation.org>2021-02-26 14:16:06 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2021-02-26 14:16:06 -0800
commita3905af5be36b9aa9f17657a02eeb2a08e939c13 (patch)
treeccbc63b85f3d0088fe22df7e47968d6ea7c88df6 /scripts/parse-maintainers.pl
parente7270e47a09e83051da7b2bee71be00741860ec4 (diff)
parent8f722f67452f4b28cd8d7acf1658daa5796437c2 (diff)
Merge tag 'for-linus' of git://github.com/openrisc/linux
Pull OpenRISC updates from Stafford Horne: - Update for Litex SoC controller to support wider width registers as well as reset. - Refactor SMP code to use device tree to define possible cpus. - Update build including generating vmlinux.bin * tag 'for-linus' of git://github.com/openrisc/linux: openrisc: Use devicetree to determine present cpus drivers/soc/litex: Add restart handler openrisc: add arch/openrisc/Kbuild drivers/soc/litex: make 'litex_[set|get]_reg()' methods private drivers/soc/litex: support 32-bit subregisters, 64-bit CPUs drivers/soc/litex: s/LITEX_REG_SIZE/LITEX_SUBREG_ALIGN/g drivers/soc/litex: separate MMIO from subregister offset calculation drivers/soc/litex: move generic accessors to litex.h openrisc: restart: Call common handlers before hanging openrisc: Add vmlinux.bin target
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