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| author | William Wu <william.wu@rock-chips.com> | 2016-08-16 22:44:39 +0800 |
|---|---|---|
| committer | Felipe Balbi <felipe.balbi@linux.intel.com> | 2016-08-25 12:13:11 +0300 |
| commit | 00fe081dc3a37032c05e308c40d241d60c05ebe6 (patch) | |
| tree | 08717b3e4cd39eb6c4998162fc5fa0938595cc65 /scripts/analyze_suspend.py | |
| parent | 32f2ed864dd523bca2ee804effa9f3f43aa03ba6 (diff) | |
usb: dwc3: add dis_del_phy_power_chg_quirk
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.
Signed-off-by: William Wu <william.wu@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Diffstat (limited to 'scripts/analyze_suspend.py')
0 files changed, 0 insertions, 0 deletions