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authorAlex Deucher <alexander.deucher@amd.com>2019-06-25 08:54:21 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-06-25 12:08:46 -0500
commit3e10f3196b55f3ed41a2727e9720c19e5ff1078f (patch)
treed61bc77edda6df703b086aa868ee93d2bf01fc0b /samples/kprobes
parent44ff0ae6b15e78565199a4c295de2a5bac425922 (diff)
drm/amdgpu/display: switch udelay to msleep
We may need to sleep for up to 80ms (8ms per each of up to 10 loop iterations): /* First DPCD read after VDD ON can fail if the particular board * does not have HPD pin wired correctly. So if DPCD read fails, * which it should never happen, retry a few times. Target worst * case scenario of 80 ms. */ Switch udelay to msleep to avoid limits on arm. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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