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author | Bjorn Helgaas <bhelgaas@google.com> | 2014-08-15 17:18:44 -0600 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-12 20:12:29 -0600 |
commit | d537a3abb4b7085ebc3ce35e64acbad8ece1eece (patch) | |
tree | e82a4895aa4e278463775bd53ad82a9e2a3c9022 /samples/kprobes/jprobe_example.c | |
parent | 1302fcf0d03e6ea74846c7fee14736306ab2ce4b (diff) |
PCI: pciehp: Reduce PCIe slot_ctrl to 16 bits
4283c70e91dc ("PCI: pciehp: Make pcie_wait_cmd() self-contained") added
a cache of the most recent command written to the Slot Control register.
This register is only 16 bits wide, but the cache ("slot_ctrl") is 32 bits.
Reduce slot_ctrl to a u16 so it matches the register size. No functional
change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'samples/kprobes/jprobe_example.c')
0 files changed, 0 insertions, 0 deletions